Processing system with dynamically allocatable buffer memory
First Claim
1. A scalable computer system, comprising:
- an interconnect bus;
a host processor coupled to the interconnect bus; and
one or more function-specific processors including network processor, a file processor and a storage processor, the one or more function-specific processors coupled to the interconnect bus for communicating with other processors, each function-specific processor having a buffer memory coupled thereto, the buffer memory having one or more segments which serve as function-specific caches to cache function specific data including network processing data, file processing data and storage processing data, the segments being dynamically allocatable to different processors.
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Accused Products
Abstract
A scalable computer system has an interconnect bus providing communication links among a host processor and one or more function-specific processors, including a network processor (NP) and a file storage processor (FSP). The host processor provides a single interface to network administrators for maintaining the system. A bi-endian conversion system is provided to minimize a need for translating between big and little endian data types generated by diverse processors. The NP shares a single memory image with other processors and has a buffer memory for buffering requests from the network interfaces. The buffer memory has one or more segments which are dynamically allocatable to different processors. The FSP has a metadata cache for maintaining information on data being cached in the NP buffer memory. The FSP also has a write cache for buffering file write operations directed at disks. Upon receiving requests for data from the NP, the FSP checks the metadata cache to see if a copy of the requested data has been cached in the NP buffer and, if the copy exists in the NP buffer, causing the NP with the data to respond to the request. The resulting scalable computer provides higher data availability, faster access to shared data, and reduced administrative costs via data consolidation.
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Citations
45 Claims
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1. A scalable computer system, comprising:
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an interconnect bus; a host processor coupled to the interconnect bus; and one or more function-specific processors including network processor, a file processor and a storage processor, the one or more function-specific processors coupled to the interconnect bus for communicating with other processors, each function-specific processor having a buffer memory coupled thereto, the buffer memory having one or more segments which serve as function-specific caches to cache function specific data including network processing data, file processing data and storage processing data, the segments being dynamically allocatable to different processors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A computer system, comprising:
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an interconnect bus; a host processor coupled to the interconnect bus; a network processor (NP) coupled to the interconnect bus and sharing a single memory image with other processors, including; one or more network interfaces coupled to the NP; and a buffer memory coupled to the NP for buffering requests from the network interfaces, the buffer memory having one or more segments which are dynamically allocatable to different processors; and a file storage processor (FSP) coupled to the interconnect bus, including; one or more data storage devices coupled to the FSP, each data storage device having files and associated metadata; a metadata cache coupled to the FSP for buffering the metadata, the metadata cache maintaining information on data stored on the NP buffer memory; and a write cache coupled to the FSP for buffering file write operations from the FSP, where the FSP, upon receiving requests for data from the NP, checks the metadata cache to see if a copy of the requested data has been cached in the NP buffer and, if the copy exists in the NP buffer, causing the NP with the data to respond to the request. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 41, 42, 44, 45)
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40. A method for operating scalable computer system having an interconnect bus;
- a host processor coupled to the interconnect bus;
a network processor (NP) coupled to the interconnect bus and sharing a single memory image with other processors, each NP having one or more network interfaces coupled to the NP and a buffer memory coupled to the NP for buffering requests from the network interfaces, the buffer memory having one or more segments which are dynamically allocatable to different processors; and
a file storage processor (FSP) coupled to the interconnect bus with one or more data storage devices coupled to the FSP, each data storage device having files and associated metadata, a metadata cache coupled to the FSP for buffering the metadata, the metadata cache maintaining information on data stored on the NP buffer memory, and a write cache coupled to the FSP for buffering file write operations from the FSP, comprising;receiving a data request from the NP; checking the metadata cache to see if a copy of the requested data is cached in the NP buffer; and if the copy exists in the NP buffer, transmitting the copy from the NP buffer in response to the request and otherwise accessing the data storage device in accordance with the request.
- a host processor coupled to the interconnect bus;
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43. A method for operating a scalable computer system having an interconnect bus, a host processor coupled to the interconnect bus, and one or more function-specific processors coupled to the interconnect bus for communicating with other processors, each function-specific processor having a buffer memory coupled thereto, the buffer memory having one or more segments which serve as function-specific caches and which are dynamically allocatable to different processors, comprising:
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receiving a data request; checking if a copy of the requested data is cached in one of the function-specific processor; and if the copy exists in one of the function-specific processor, transmitting the copy in response to the request and otherwise accessing the data storage device in accordance with the request.
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Specification