Packaging method of thin film passive components on silicon chip

• US 6,083,766 A
• Filed: 09/20/1999
• Issued: 07/04/2000
• Est. Priority Date: 07/01/1999
• Status: Expired due to Fees

• Current Assignee: Viking Tech Corporation
• Original Assignee: Viking Tech Corporation
• Inventors: Chen, Lung-hsin
• Primary Examiner(s): Bowers, Charles
• Assistant Examiner(s): Thompson, Craig
• Application Number:
  US09/399,365
• Time in Patent Office: 288 Days
• Field of Search: 438/14, 438/388, 438/381, 438/455, 438/758, 438/800
• US Class Current: 438/15
• CPC Class Codes: H01C 1/01 Mounting; Supporting
• CPC Class Codes: H01C 1/02 Housing; Enclosing; Embedding; Filling the housing or enclosure
• CPC Class Codes: H01C 7/006 Thin film resistors
• CPC Class Codes: H01G 2/10 Housing; Encapsulation
• CPC Class Codes: H01G 4/33 Thin- or thick-film capacitors thin- or thick-film circuits H01L27/00; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor H01L28/40
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 23/15 Ceramic or glass substrates H01L23/142, H01L23/145, H01L23/147 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]

Abstract

The present invention relates to a packaging method of thin film passive components on silicon chip, which employs ceramic or glass substrate to be mounted with the silicon chip so as to improve the mechanical strength of the components, and to a method of using thick film packaging technology to package the component. The cycle time of packaging is saved and the production cost is low.

Claims

1. A packaging method of thin film passive components on a silicon chip comprising the steps of:

(a) forming an oxidized silicon substrate;

(b) forming thin film passive components on the substrate including the sub-steps of;

(b-1) forming a resistor layer and a first metallic conductive layer in sequence on the substrate by sputter deposition or vapor deposition technology and forming a resistor pattern on the resistor layer by photolithography and etching technologies, and forming a pattern for the two electrodes of the resistor on the first metallic conductive layer;

(b-2) forming a dielectric layer on the first metallic conductive layer by sputter deposition or CVD technology and forming a dielectric layer pattern by photolithography and etching technologies; and

(b-3) forming a second metallic conductive layer on the dielectric layer by sputter deposition or vapor deposition and forming a second metallic conductive layer pattern by photolithography and etching technologies;

(c) forming a passivation layer by screen printing, and processing marking, polishing, and cutting to form a plurality of chips;

(d) forming an appropriate shape of a ceramic substrate used in the thick film passive component by a first cutting and a second cutting;

(e) coating an adhesive on the surface of the ceramic substrate;

(f) adhering the silicone chips onto the surface of the ceramic which is coated with the adhesive under an appropriate temperature and pressure;

(g) packaging by the method of thick film packaging, comprising the steps of

(g-1) forming terminations and drying same;

(g-2) electroplating the electrode;

(g-3) testing the electrical characteristics of the formed integrated RC component; and

(g-4) packaging all the obtained RC components.

2. A packaging method of thin film passive components on silicon chip as set forth in claim 1, wherein after the formation of said second metallic conductive layer, said plurality of chips are annealed to eliminate the stress therein;

laser trimming technology is used to trim the resistance value; and

electrical properties of the resistors and capacitors of said plurality of chips are measured.

3. A packaging method of thin film passive components on silicon chip as set forth in claim 1, wherein said ceramic substrate includes Al₂ O₃ or AlN.

4. A packaging method of thin film passive components on silicon chip as set forth in claim 1, wherein said adhesive is a insulative thermal-conductive material containing epoxy, and the method of coating is selected from printing, dot-gluing or transfer printing.

5. A packaging method of thin film passive components on a silicon chip comprising the steps of:

(a) forming an oxidized silicon substrate;

(b) forming thin film passive components on the substrate including the sub-steps of;

(b-1) forming a resistor layer and a first metallic conductive layer in sequence on the substrate by sputter deposition or vapor deposition technology and forming a resistor pattern on the resistor layer by photolithography and etching technologies, and forming a pattern for the two electrodes of the resistor on the first metallic conductive layer;

(b-2) forming a dielectric layer on the first metallic conductive layer by sputter deposition or CVD technology and forming a dielectric layer pattern by photolithography and etching technologies; and

(b-3) forming a second metallic conductive layer on the dielectric layer by sputter deposition or vapor deposition and forming a second metallic conductive layer pattern by photolithography and etching technologies;

(c) forming a passivation layer by screen printing, and processing marking, polishing, and cutting to form a plurality of chips;

(d) forming an appropriate shape of a glass substrate used in the thick film passive component by a first cutting and a second cutting;

(e) coating an adhesive on the surface of the glass substrate;

(f) adhering the chips onto the surface of the glass substrate which is coated with the adhesive under an appropriate temperature and pressure;

(g) packaging by the method of thick film packaging, comprising the steps of

(g-1) forming terminations and drying same;

(g-2) electroplating the electrode;

(g-3) testing the electrical characteristics of the formed integrated RC component; and

(g-4) packaging all the obtained RC components.

6. A packaging method of thin film passive components on silicon chip as set forth in claim 5, wherein after the formation of said second metallic conductive layer, said plurality of chips are annealed to eliminate the stress therein;

laser trimming technology is used to trim resistance value; and

electrical properties of the resistors and capacitors of said plurality of chips are measured.

7. A packaging method of thin film passive components on silicon chip as set forth in claim 5, wherein said glass substrate includes common glass or quartz glass materials.

8. A packaging method of thin film passive components on silicon chip as set forth in claim 5, wherein said adhesive is an insulative thermal-conductive material containing epoxy, and the method of coating is selected from printing, dot-gluing or transfer printing.