Trench MOSFET having improved breakdown and on-resistance characteristics

• US 6,084,264 A
• Filed: 11/25/1998
• Issued: 07/04/2000
• Est. Priority Date: 11/25/1998
• Status: Expired due to Term

• Current Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Original Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Inventors: Darwish, Mohamed N.
• Primary Examiner(s): MINTEL, WILLIAM A
• Application Number:
  US09/200,197
• Time in Patent Office: 587 Days
• Field of Search: 257/330, 257/329, 257/332, 257/334, 257/331, 438/206
• US Class Current: 257/329
• CPC Class Codes: H01L 29/0615 by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] LDD or drain offset regions H01L29/7833
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/0886 Shape
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A trench MOSFET is formed in a structure which includes a P-type epitaxial layer overlying an N+ substrate. An N drain region is implanted through the bottom of the trench into the P-epitaxial layer, and after a diffusion step extends between the N+ substrate and the bottom of the trench. The junction between the N drain region and the P-epitaxial layer extends between the N+ substrate and a sidewall of the trench. In some embodiments the epitaxial layer can have a stepped doping concentration or a threshold voltage adjust implant can be added. Alternatively, the drain region can be omitted, and the trench can extend all the way through the P-epitaxial layer into the N+ substrate. A MOSFET constructed in accordance with this invention can have a reduced threshold voltage and on-resistance and an increased punchthrough breakdown voltage.

Claims

1. A power MOSFET comprising:

a semiconductor substrate of a first conductivity type;

an epitaxial layer overlying the substrate, the epitaxial layer being generally of a second conductivity type opposite to the first conductivity type, a trench being formed in the epitaxial layer; and

a gate positioned in the trench and electrically isolated from the epitaxial layer by an insulating layer which extends along a bottom and a sidewall of the trench;

the epitaxial layer comprising;

a source region of the first conductivity type, the source region being located adjacent a top surface of the epitaxial layer and the sidewall of the trench;

a body of the second conductivity type adjoining a portion of the sidewall of the trench; and

a drain region of the first conductivity type extending downward from the bottom of the trench and merging with first conductivity dopant of the substrate, wherein the body extends downward to form a first PN junction with the first conductivity dopant of the substrate and a second PN junction with the drain region, the second PN junction extending between the first PN junction and the sidewall of the trench.

2. The MOSFET of claim 1 wherein at least 75% of the drain region is located directly below the trench.

3. The MOSFET of claim 1 wherein at least 90% of the drain region is located directly below the trench.

4. The MOSFET of claim 1 wherein the shape of the second PN junction between the drain region and the body is an arc that is concave in the direction towards the drain region.

5. The MOSFET of claim 1 wherein the doping concentration in the drain region is between 5×

10¹⁵ cm^-3 and 5×

10¹⁷ cm^-3.

6. The MOSFET of claim 1 further comprising a threshold voltage adjust implant.

7. The MOSFET of claim 1 further comprising a body implant.

8. The MOSFET of claim 1 wherein the epitaxial layer comprises at least two sublayers, a first sublayer adjacent the surface of the epitaxial layer and a second sublayer between the first sublayer and the substrate, the first sublayer having a doping concentration different from the doping concentration of the second sublayer.

9. The MOSFET of claim 8 wherein the doping concentration in the first sublayer is greater than the doping concentration in the second sublayer.

10. The MOSFET of claim 8 wherein the doping concentration in the first sublayer is lower than the doping concentration in the second sublayer.

11. The MOSFET of claim 8 wherein an interface between the first sublayer and the second sublayer intersects the sidewall of the trench.

12. A power MOSFET comprising:

a semiconductor substrate of a first conductivity type;

an epitaxial layer overlying the substrate, a trench being formed in the epitaxial layer; and

a gate positioned in the trench and electrically isolated from the epitaxial layer by an insulating layer which extends along a bottom and a sidewall of the trench;

the epitaxial layer comprising;

a source region of the first conductivity type, the source region being located adjacent a top surface of the epitaxial layer and the sidewall of the trench;

a body of the second conductivity type, the second conductivity type dopant of the body forming a PN junction with the first conductivity type dopant of the substrate, the PN junction being substantially coincident with the interface between the epitaxial layer and the substrate; and

a drain region of the first conductivity type extending between the substrate and the bottom of the trench.

13. The MOSFET of claim 12 wherein a second PN junction between the drain region and the body extends between the PN junction and the sidewall of the trench.

14. A power MOSFET comprising:

a semiconductor substrate of a first conductivity type;

an epitaxial layer overlying the substrate, the epitaxial layer being generally of a second conductivity type opposite to the first conductivity type;

a trench extending from a surface of the epitaxial layer, through the epitaxial layer and into the substrate;

a gate positioned in the trench and electrically isolated from the epitaxial layer by an insulating layer which extends along a bottom and a sidewall of the trench; and

a source region of the first conductivity type in the epitaxial layer, the source region being located adjacent a top surface of the epitaxial layer and the sidewall of the trench.