Media access control transmitter and parallel network management system

• US 6,085,248 A
• Filed: 04/24/1997
• Issued: 07/04/2000
• Est. Priority Date: 02/11/1997
• Status: Expired due to Term

• Current Assignee: Secure Axcess LLC (Prism Technologies Group, Inc.)
• Original Assignee: Xaqtu Corporation
• Inventors: Tripathi, Devendra K., Sambamurthy, Namakkal S., Kumar, Praveen D., Truong, Linh Tien, Deb, Alak K.
• Primary Examiner(s): Maung, Zarni
• Assistant Examiner(s): Barot, Bharat
• Application Number:
  US08/845,563
• Time in Patent Office: 1,167 Days
• Field of Search: 395/200.23, 395/200.5-200.6, 395/200.62, 395/200.63, 395/200.64, 395/200.65, 395/200.66, 395/200.78, 395/200.8, 395/878-881 , 395/840-844, 395/821, 395/825, 370/229-230, 709/223, 709/227-230, 709/232-238, 709/248-250, 710/1, 710/5, 710/20-24, 710/58-61, 711/100, 711/109
• US Class Current: 709/229
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: H04L 69/12 Protocol engines
• CPC Class Codes: H04L 9/40 Network security protocols

Abstract

Disclosed is a transmit media access controller having a transmit interface unit configured to receive packet data, transfer control signals and control information from an upper layer. The transmit media access controller also includes a transmit controller for processing the packet data based on the control information received from the upper layer. The transmit control block is bi-directionally coupled to the transmit interface unit. While the packet data is being processed, new control information may be received by the in communication with the transmit controller. The transmit media access controller further includes an interface unit configured to receive packet data from the transmit cyclic redundancy check unit before being transmitted to a physical layer.

Claims

1. A transmit media access controller, comprising:

a transmit interface unit configured to receive packet data, transfer control signals and control information from an upper layer, wherein the transmit interface unit is operable to substantially simultaneously receive the control information and the packet data;

a transmit controller for processing the packet data based on the control information received from the upper layer, the transmit controller being bi-directionally coupled to the transmit interface unit, wherein while the packet data is being processed, the transmit controller is operable to receive new control information from the transmit interface unit thereby altering at least part of the processing;

a transmit utilities block for monitoring and accounting processing events within the transmit controller;

a transmit cyclic redundancy check unit configured to receive packet data from the transmit interface unit, the transmit cyclic redundancy check unit being in communication with the transmit controller; and

an interface unit configured to receive packet data from the transmit cyclic redundancy check unit before being transmitted to a physical layer.

2. A transmit media access controller as recited in claim 1, wherein the interface unit is configured to communicate with a fiber channel physical layer.

3. A transmit media access controller as recited in claim 2, wherein the interface unit communicates with the fiber channel physical layer through a fiber channel encoder.

4. A transmit media access controller as recited in claim 1, wherein the interface unit includes a gigabit media independent interface configured to communicate with an ethernet physical layer.

5. In a media access controller configured to communicate with an upper layer and a lower physical layer, the media access controller including a transmit controller for receiving and processing transmit data requests from the upper layer and outputting received data to the physical layer, a method comprising:

receiving data from the upper layer and processing the received data through the transmit controller, the processing being performed in accordance with a setting of a plurality of control registers associated with the transmit controller;

receiving a control signal for modifying at least one of the plurality of control registers while the data is being processed by the transmit controller from the upper layer;

altering the processing of data being processed within the transmit controller based on the modification of the at least one of the plurality of control registers associated with the transmit controller; and

outputting the processed data.

6. A method as recited in claim 5, wherein the step of receiving a control signal is performed in parallel with receiving data from the upper layer.

7. A method recited in claim 5, wherein the plurality of control registers includes a command protocol register, a defer period register, a slot time register, a retry limit register, and a programmable minimum and maximum packets size register.

8. A method recited in claim 7, wherein the defer period register is arranged to define a period of time that the transmitter is to wait before retransmission after a collision is detected, the defer period register being modifiable during the processing of data within the transmit controller.

9. A method recited in claim 7, wherein the slot time register is arranged to define a unit of backoff, the a slot time register being modifiable during the processing of data within the transmit controller.

10. A method recited in claim 7, wherein the retry limit register is arranged to define a number of re-transmission attempts made before the data to be transmitted is dropped, the retry limit register being modifiable during the processing of the data within the transmit controller.

11. A method recited in claim 7, wherein the progranmmable minimum and maximum packets size register defines the size of a data packet, the size of the data packet being modifiable during the processing of the data within the transmit controller.

12. A method as recited in claim 7, further comprising the step of:

identifying a selected one of the plurality of control registers to be modified by the received control signal;

setting a control signal on a control bus;

latching the control information set on the control bus; and

loading the selected control register from the control bus.

13. A method as recited in claim 7, wherein the command protocol register contains a plurality of flags for enabling and disabling data processing functions within the transmit controller.

14. A method as recited in claim 13, wherein the plurality of flags are selected from the group consisting of an enable transmit flag, a full duplex mode flag, an automatic padding flag, a no cyclic redundancy check flag, a no preamble flag, a no carrier extension flag, a start sample line flag, and a force transit flag.

15. A method as recited in claim 7, wherein when the control registers are arranged to alter an inter packet gap between adjacent packets transmitted by the transmit controller, thereby altering the data rate of the output data.

16. A method as recited in claim 7, wherein the media access controller is programmed through a graphical user interface.

17. A method as recited in claim 5, wherein the step of receiving data from the upper layer includes:

receiving a packet valid bit from the upper layer on a transfer control signal bus;

receiving a data ready flag from the upper layer on the control signal bus; and

communicating a ready for data flag to the upper layer over the control signal bus.

18. A transmit media access controller, comprising:

a transmit interface unit configured to receive packet data, transfer control signals and control information from an upper layer;

a transit control block containing state machines for processing the packet data based on the control information received from the upper layer, the transmit control block being bidirectionally coupled to the transmit interface unit;

a transmit utilities block for monitoring and accounting processing events within the transmit control block;

a transmit cyclic redundancy check unit configured to receive packet data from the transmit interface unit, and the transmit control block being in communication with the transmit cyclic redundancy check unit; and

a transmit fiber channel and gigabit media independent interface unit configured to receive packet data from the transmit cyclic redundancy check unit before being transmitted to a physical medium.

19. A transmit media access controller as recited in claim 18, wherein the transmit control block further includes a backoff calculating unit and a defer calculating unit.

20. A transmit media access controller as recited in claim 18, wherein the state machines includes a command control state machine, a frame control state machine and a support logic unit.

21. A transmit media access controller as recited in claim 20, further comprising a transmit control register block being contained within the transmit interface unit, the transmit control register block being configured to receive the control information and at least part of the transfer control signals.

22. A transmit media access controller as recited in claim 21, further comprising a local control logic unit being contained within the transmit interface unit, the local control logic unit being configured to receive at least part of the transfer control signals, and upon a packet data transfer event, a data ready flag is passed from the upper layer to the local control logic unit, and a ready for data flag is passed from the local control logic to the upper layer.

23. A transmit media access controller as recited in claim 21, wherein the transmit control register block includes a plurality of registers for programming processing parameters within the transmit control block.

24. A transmit media access controller as recited in claim 23, wherein the plurality of registers are selected from the group consisting essentially of a command protocol register, a defer period register, a slot time register, a retry limit register, and a programmable minimum and maximum packet data size register.

25. A transmit media access controller as recited in claim 24, wherein the command protocol register includes a plurality of flags for setting processing parameters within the transmit control block and the cyclic redundancy check unit.

26. A transmit media access controller as recited in claim 25, wherein the plurality of flags are selected from the group consisting essentially of an enable transmit flag, a full duplex mode flag, an automatic padding flag, a no cyclic redundancy check flag, a no preamble flag, a no carrier extension flag, a start sample line flag, and a force transit flag.

27. A transmit media access controller as recited in claim 21, wherein the plurality of registers are programmable while packet data is being processed.

28. A controller for controlling the transfer of data between a physical layer and an upper layer, the controller comprising:

a transmitter for transmitting data packets received from the upper layer to the physical layer, the transmitter being configured to selectively insert gaps between sequential data packets; and

a defer period register that is configured to be selectively written into to indicate the duration of an inter-packet gap to be inserted as a gap between sequential packets of data being transferred to the physical layer, the defer period register being configurable while data packets are being processed by the transmitter to thereby alter the duration of an inter-packet gap.

29. A controller as recited in claim 28, wherein the defer period register is modifiable when the transmitter is transmitting data packets between the upper layer and the physical layer.

30. A controller as recited in claim 28, wherein the gap between sequential packets of data sets a packet transfer rate.

31. A media access controller for controlling the transfer of data between a physical layer and an upper layer, the media access controller comprising:

a transmitter for transmitting data received from the upper layer to the physical layer;

a retry-limit register that is configured to be selectively written into to program a number of times the media access controller attempts a transmit before aborting a data transmit between the upper layer and the physical layer, the retry-limit register being configurable while data is being processed by the transmitter to thereby alter the number of times the media access controller attempts a transmit before aborting a data transmit.

32. A media access controller as recited in claim 31, wherein the number of times the media access controller attempts a transmit is adjusted upward to prevent aborts during a high traffic period.

33. A media access controller for controlling the transfer of data between a physical layer and an upper layer, the media access controller comprising:

a transmitter for transmitting data received from the upper layer to the physical layer;

a programmable minimum and maximum packet size register that is configured to be selectively written into to adjust a size of packet data that is being transmitted through the transmitter, the programmable minimum and maximum packet size register being configurable while packet data is being processed by the transmitter to thereby alter the size of the packet data.