Chip scale package
First Claim
1. A chip scale package for packaging an IC chip, comprising:
- an IC chip having a top surface, a bottom surface, and side surfaces extending between said top and bottom surfaces, at least a pair of spaced bonding points being disposed on said top surface of said IC chip;
a package frame having opposite side walls, each extending along a respective one of said side surfaces of said IC chip, said package frame further having bottom beams extending beneath said bottom surface of said IC chip from a lower portion of said side walls of said package frame, said side walls of said package frame having respective upper portions extending above said top surface of said IC chip, a first gap being defined between said side surfaces of said IC chip and said side walls of said package frame, and a second gap being defined between said bottom surface of said IC chip and said bottom beams of said package frame;
at least a pair of substantially identical leads electrically coupled to respective said bonding points, and extending therefrom in opposite directions, each of said leads having;
an inner lead portion attached to said top surface of said IC chip,an outer lead portion bent to follow a contour of outside surface of a respective one of said side walls and said bottom beams of said package frame, anda connecting segment coupled between said inner lead portion and said outer lead portion and extending in slanted mutual relationship thereto between substantially said top surface of said IC chip and said upper portion of said side walls of said package frame, an angle being formed between said connecting segment and said side walls of said package frame;
said angle and said first and second gaps defined between said IC chip and said package frame changing in response to induced stress, thereby cushioning said stress.
1 Assignment
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Accused Products
Abstract
A chip scale package for packaging an IC chip includes a package frame displaced from the side and bottom surfaces of the IC chip by a predetermined gap and a pair of leads symmetrically extending in opposite directions. Each lead has an inner lead portion coupled to a bonding point on the top surface of the IC chip, and an outer lead portion bent and contoured in such a way that to follow the shape of the outside surface of the package frame. The lead further includes a connecting segment extending between the inner lead portion and the outer lead portion. Under heat induced stress, an angle between the connecting segment and the wall of the package frame changes causing displacement of the IC chip from its original position, and the gap between the surfaces of the IC chip and the package frame absorbs deviations in position of the IC chip, to cushion the stress effect.
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Citations
7 Claims
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1. A chip scale package for packaging an IC chip, comprising:
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an IC chip having a top surface, a bottom surface, and side surfaces extending between said top and bottom surfaces, at least a pair of spaced bonding points being disposed on said top surface of said IC chip; a package frame having opposite side walls, each extending along a respective one of said side surfaces of said IC chip, said package frame further having bottom beams extending beneath said bottom surface of said IC chip from a lower portion of said side walls of said package frame, said side walls of said package frame having respective upper portions extending above said top surface of said IC chip, a first gap being defined between said side surfaces of said IC chip and said side walls of said package frame, and a second gap being defined between said bottom surface of said IC chip and said bottom beams of said package frame; at least a pair of substantially identical leads electrically coupled to respective said bonding points, and extending therefrom in opposite directions, each of said leads having; an inner lead portion attached to said top surface of said IC chip, an outer lead portion bent to follow a contour of outside surface of a respective one of said side walls and said bottom beams of said package frame, and a connecting segment coupled between said inner lead portion and said outer lead portion and extending in slanted mutual relationship thereto between substantially said top surface of said IC chip and said upper portion of said side walls of said package frame, an angle being formed between said connecting segment and said side walls of said package frame; said angle and said first and second gaps defined between said IC chip and said package frame changing in response to induced stress, thereby cushioning said stress. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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Specification