Pulse generating circuits using drift step recovery devices

• US 6,087,871 A
• Filed: 02/26/1997
• Issued: 07/11/2000
• Est. Priority Date: 11/15/1995
• Status: Expired due to Fees

• Current Assignee: Alexei F. Kardo-Syssoev, Igor G. Tchashnikov, Sergey V. Zazulin, Vladimir M. Efanov
• Original Assignee: Alexei F. Kardo-Syssoev, Igor G. Tchashnikov, Sergey V. Zazulin, Vladimir M. Efanov
• Inventors: Tchashnikov, Igor G., Kardo-Syssoev, Alexei F., Zazulin, Sergey V., Efanov, Vladimir M.
• Primary Examiner(s): ZWEIZIG, JEFFERY SHAWN
• Application Number:
  US08/806,645
• Time in Patent Office: 1,231 Days
• Field of Search: 327/113, 327/114, 327/184, 327/188, 327/189, 327/190, 327/374, 327/493
• US Class Current: 327/189
• CPC Class Codes: H03K 3/33 by the use, as active elements, of semiconductor devices exhibiting hole storage or enhancement effect
• CPC Class Codes: H03K 3/57 the switching device being a semiconductor device

Abstract

A pulse generating circuit utilizes a drift step recovery transistor to apply power from a direct current power supply to a pulse forming network when a trigger pulse is applied thereto. The pulse forming network comprises a storage inductor connected in series with the transistor, a series connected separating diode and a drift step recovery diode which are connected in parallel with the storage inductor, a series connected pumping inductor and pumping resistor which together form a pumping circuit connected in parallel with respect to the separating diode, and a load resistor. Current passed via the transistor increases in the storage inductor and the pumping inductor and is blocked by the separating diode to inject electron-hole plasma from the pumping inductor into the drift step recovery diode when the transistor is conducting. The transistor blocks current at the end of the trigger pulse, and the storage inductor reverses polarity to bias the separating diode into a conducting state to extract the plasma from the drift step recovery diode. The drift step recovery diode blocks current after the plasma has been extracted to switch current from the storage inductor into the load resistor to generate a pulse.

Claims

1. A pulse generating circuit comprising:

a power supply;

a step recovery transistor having its collector connected to said power supply;

a trigger pulse generating device connected between the base and emitter of said step recovery transistor; and

a pulse forming network connected to said step recovery transistor for receiving power from said power supply when said trigger pulse is applied to turn on said step recovery transistor, said pulse forming network comprising a storage inductor connected in parallel with a series connected separating diode and a step recovery diode, said separating diode and said step recovery diode being in reverse polarity with respect to each other, a pumping circuit comprising a series connected pumping inductor and pumping resistor, said pumping circuit being connected to the base of said step recovery transistor and to said step recovery diode, a load resistor connected to the junction of said step recovery diode and said pumping circuit, and a second inductor connected at one end to the junction of said separating diode and said storage inductor and connected at the other end to the base of said step recovery transistor;

wherein current passed via said step recovery transistor increases in said storage inductor and said pumping inductor and is blocked by said separating diode to inject electron-hole plasma from said pumping inductor into said step recovery diode when said step recovery transistor is conducting, said step recovery transistor blocking current at the end of said trigger pulse, said storage inductor and said second inductor reversing polarity to bias said separating diode into a conducting state to extract said plasma from said step recovery diode, said second inductor charging a capacitance corresponding to said step recovery transistor collector, said step recovery diode blocking current after said plasma has been extracted to switch current from said storage inductor and said second inductor into said load resistor to generate a pulse.

2. A pulse generating circuit as claimed in claim 1, wherein said step recovery transistor is a drift step recovery transistor.

3. A pulse generating circuit as claimed in claim 1, wherein said step recovery diode is configured to block current when current in said second inductor reaches a maximum value while oscillating to charge said collector capacitance such that current in said second inductor substantially coincides and is summed with current in said storage inductor in said step recovery diode when said step recovery diode breaks current, said pulse not being affected by said collector capacitance.

4. A pulse generating circuit as claimed in claim 1, further comprising a series circuit comprising a capacitor and a diode, said series circuit connected at one end thereof to the base of said step recovery transistor and at the other end thereof to ground, said step recovery diode having polarity to prevent charging of capacitance thereof by said power supply when said step recovery transistor is conducting, said capacitor being charged along with said collector capacitance by said second inductor, said series circuit increasing the duration of time said step recovery diode is conducting and the ratio of the voltage across said step recovery diode and the voltage across said step recovery transistor.

5. A pulse generating circuit comprising:

a first power supply;

first and second step recovery transistors having their respective collectors connected to said first power supply;

first and second series circuits, each comprising a capacitor and a diode, said first and second series circuits connected at one end thereof to the base of said first and second step recovery transistors, respectively, and at the other end thereof to ground, said capacitor in each of said first and second series circuits being prevented from charging by said first power supply when the corresponding one of said first and second step recovery transistors is conducting, said first and second series circuits increasing the duration of time said step recovery diode is conducting and the voltage across said step recovery diode with respect to said first and second step recovery transistors;

a trigger pulse generating device connected between the base and emitter of each of said first and second step recovery transistors; and

a pulse forming network for receiving power from said first power supply when said trigger pulse is applied to turn on said first and second step recovery transistors, said pulse forming network comprising a storage inductor connected in parallel with a series connected separating diode and a step recovery diode, said separating diode and said step recovery diode being in reverse polarity with respect to each other, a second inductor in series with said storage inductor and connected to the base of said first step recovery transistor, a pumping inductor connected at one end to the base of said second step recovery transistor and at the other end thereof to said step recovery diode, and a load resistor connected to the junction of said step recovery diode and said second inductor;

wherein current passed via said first and second step recovery transistors increases in said storage inductor, said second inductor and said pumping inductor and is blocked by said separating diode to inject electron-hole plasma from said pumping inductor into said step recovery diode when said first and second step recovery transistors are conducting, said first and second step recovery transistors blocking current at the end of said trigger pulse, said storage inductor and said second inductor reversing polarity to bias said separating diode into a conducting state to extract said plasma from said step recovery diode, said second inductor charging a capacitance corresponding to the collector of said first step recovery transistor and said pumping inductor charging a capacitance corresponding to the collector of said second step recovery transistor, said capacitor in each of said first and second series circuits being charged along with said collector capacitance of said first and second step recovery transistors, respectively, said step recovery diode blocking current after said plasma has been extracted to switch current from said storage inductor and said second inductor into said load resistor to generate a pulse, said second series circuit operating to increase the duration of time said step recovery diode is conducting and the voltage across said step recovery diode with respect to the voltage across said first and second step recovery transistors.

6. A pulse generating circuit as claimed in claim 5, wherein the inductance of said storage conductor, said second inductor and said pumping inductor are substantially equal and the capacitance of said capacitor in each of said first and second series circuits are substantially equal.

7. A pulse generating circuit as claimed in claim 6, wherein the said second step recovery transistor is turned on in approximately the middle of the period during which said first step recovery transistor is conducting.

8. A pulse generating circuit as claimed in claim 6, further comprising a second power supply, said second step recovery transistor being turned on at approximately the same time as said first step recovery transistor, the voltage supplied by said first power supply to the collector of said first step recovery transistor being approximately twice the voltage supplied by said second power supply to the collector of said second step recovery transistor.

9. A method of generating a pulse comprising the steps of:

generating a trigger pulse;

conducting current through a first step recovery device to supply power to a pulse forming network for substantially the duration of said trigger pulse;

providing power to a pumping inductor and a storage inductor in said pulse forming network with current;

preventing current from flowing from said storage inductor to a second step recovery device in said pulse forming network during said conducting step;

injecting electron-hole plasma into said second step recovery device from said pumping inductor during said conducting step;

supplying current from said storage inductor to said second step recovery device after said conducting step to extract plasma from said second step recovery device until substantially all plasma is extracted from said second step recovery device; and

switching current of said storage inductor from said second step recovery device to a load resistance to generate a pulse;

wherein said first step recovery device is a step recovery transistor and further comprising the step of decreasing recharging of the capacitance associated with the transistor collector into said load resistance, said decreasing step comprising the steps of;

providing power to a second inductor during said conducting step;

charging said collector capacitance via said second inductor during said preventing step;

adding current from said second inductor to current from said storage inductor to extract plasma during said supplying step; and

switching current of said second inductor to said load resistance during said switching step for switching current of said storage inductor from said second step recovery device to a load resistance to generate said pulse.

10. A method of generating a pulse comprising the steps of:

generating a trigger pulse;

conducting current through a first step recovery device to supply power to a pulse forming network for substantially the duration of said trigger pulse;

providing power to a pumping inductor and a storage inductor in said pulse forming network with current;

preventing current from flowing from said storage inductor to a second step recovery device in said pulse forming network during said conducting step;

injecting electron-hole plasma into said second step recovery device from said pumping inductor during said conducting step;

supplying current from said storage inductor to said second step recovery device after said conducting step to extract plasma from said second step recovery device until substantially all plasma is extracted from said second step recovery device; and

switching current of said storage inductor from said second step recovery device to a load resistance to generate a pulse;

wherein said first step recovery device is a step recovery transistor and further comprising the step of connecting a first diode and a first capacitor in parallel with the capacitance associated with the collector of said step recovery transistor to increase voltage across said second step recovery device with respect to said step recovery transistor and the duration of time said second step recovery device conducts current during said supplying step.

11. A method of generating a pulse as claimed in claim 10, wherein said first step recovery device is a drift step recovery transistor.

12. A method of generating a pulse as claimed in claim 10, wherein said second step recovery device is selected from the group consisting of a step recovery diode and a drift step recovery diode.

13. A method of generating a pulse comprising the steps of:

generating a trigger pulse;

conducting current through a first step recovery device to supply power to a pulse forming network for substantially the duration of said trigger pulse;

providing power to a pumping inductor and a storage inductor in said pulse forming network with current;

preventing current from flowing from said storage inductor to a second step recovery device in said pulse forming network during said conducting step;

injecting electron-hole plasma into said second step recovery device from said pumping inductor during said conducting step;

supplying current from said storage inductor to said second step recovery device after said conducting step to extract plasma from said second step recovery device until substantially all plasma is extracted from said second step recovery device; and

switching current of said storage inductor from said second step recovery device to a load resistance to generate a pulse;

wherein said pulse forming network further comprises a first step recovery transistor connected to said pumping inductor, and further comprising the step of increasing current in said pumping inductor by conducting current through said first step recovery transistor.

14. A method of generating a pulse as claimed in claim 13, wherein said first step recovery device is a second step recovery transistor having a first diode and a first capacitor connected in parallel with the capacitance associated with the collector of said second step recovery transistor, and said first step recovery transistor has a second diode and a second capacitor connected in parallel with the capacitance associated with the collector of said first step recovery transistor, said storage inductor and pumping inductor being substantially equivalent and said first capacitor and second capacitor being substantially equivalent, and wherein said increasing step comprises the step of switching said first drift step recovery transistor into a conducting state in approximately the middle of the conducting period of said second step recovery transistor.

15. A method of generating a pulse as claimed in claim 14, wherein at least one of said first and second step recovery transistors is a drift step recovery transistor.

16. A method of generating a pulse as claimed in claim 13, wherein said first step recovery device is a second step recovery transistor having a first diode and a first capacitor connected in parallel with the capacitance associated with the collector of said second step recovery transistor, and said first step recovery transistor has a second diode and a second capacitor connected in parallel with the capacitance associated with the collector of said first step recovery transistor, said storage inductor and pumping inductor being substantially equivalent and said first capacitor and second capacitor being substantially equivalent, and wherein said increasing step comprises the step of switching said second drift step recovery transistor into a conducting state at approximately the same time as said first step recovery transistor, the collector voltage of said first step recovery transistor being approximately twice the collector voltage of said second step recovery transistor.