Active matrix liquid crystal with capacitor between light blocking film and pixel connecting electrode

• US 6,088,070 A
• Filed: 01/16/1998
• Issued: 07/11/2000
• Est. Priority Date: 01/17/1997
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Hirakata, Yoshiharu, Ohtani, Hisashi, Ogata, Yasushi
• Primary Examiner(s): Parker, Kenneth
• Application Number:
  US09/008,412
• Time in Patent Office: 907 Days
• Field of Search: 349/38, 349/39, 349/44, 349/110, 349/111, 349/139
• US Class Current: 349/38
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/13 combined with thin-film or thick-film passive components

Abstract

An conductive coating serves as a light shield film and is kept at a give voltage. A metal interconnection is located in the same layer as a source line and connected to the drain of a thin-film transistor. An interlayer insulating film is constituted of at least lower and upper insulating layers and formed between the conductive coating and the source line. According to one aspect of the invention, an auxiliary capacitor is formed by the metal interconnection and the conductive coating serving as both electrodes and at least the lower insulating layer film serving as a dielectric. The auxiliary capacitor is formed in a region of the interlayer insulating film in which the upper insulating layer has been removed by etching. According to another aspect of the invention, the conductive coating has a portion that is in contact with the lower insulating layer in a region where the conductive coating coextends with the metal interconnection.

Claims

1. An active matrix device comprising:

a gate line formed over a substrate;

a source line formed over said gate line;

a switching element including a thin film transistor formed at an intersection between said gate line and said source line wherein said source line is electrically connected to a source of said switching element;

a metal interconnection electrically connected to a drain of said switching element wherein said metal interconnection is positioned in a same layer as said source line;

an interlayer insulating film comprising lower and upper insulating layers formed over said source line, said metal interconnection and said switching element, wherein said upper insulating layer has an opening to expose said lower insulating layer in said opening;

a light blocking conductive film formed on said interlayer insulating film, further comprising a capacitor formed at said opening between said light blocking conductive film and said metal interconnection with said lower insulating layer interposed therebetween; and

a pixel electrode electrically connected to said metal interconnection and located over said light blocking conductive film,

wherein said switching element and said capacitor are provided in a region of a pixel where disclination is likely to occur.

2. A device according to claim 1 wherein said light blocking conductive film is kept at a constant voltage.

3. A device according to claim 1 wherein said lower insulating layer comprises a different material from said upper insulating layer.

4. A device according to claim 1 wherein said lower insulating layer comprises silicon nitride.

5. A device according to claim 1 wherein said upper insulating layer comprises an organic resin.

6. A device according to claim 4 wherein a thickness of said lower insulating layer is not larger than 1000 Å

.

7. A device according to claim 1 wherein said light blocking conductive film is in direct contact with said lower insulating layer in said opening.

8. A device according to claim 1 wherein said metal interconnection is provided in said region.

9. A device according to claim 1 wherein said capacitor is overlapped with said switching element.

10. An active matrix device comprising:

a gate line formed over a substrate;

a source line formed over said gate line;

a switching element including a thin film transistor formed at an intersection between said gate line and said source line wherein said source line is electrically connected to a source of said switching element;

a metal interconnection electrically connected to a drain of said switching element;

an interlayer insulating film formed over said source line, said metal interconnection and said switching element;

a light blocking conductive film formed on said interlayer insulating film;

a capacitor formed between said metal interconnection and said light blocking conductive film with said interlayer insulating film interposed therebetween,

a pixel electrode electrically connected to said metal interconnection and located over said light blocking conductive film,

wherein said capacitor covers at least an active region of said switching element, said capacitor and said switching element provided below a region where disclination is likely to occur.

11. A device according to claim 10 wherein said interlayer insulating film comprises a silicon nitride layer and an organic resin layer formed thereon, said organic resin layer having an opening to expose said silicon nitride layer therein where said capacitor is formed.

12. A device according to claim 11 wherein said interlayer insulating film further includes a silicon oxide film between said silicon nitride layer and said organic resin layer.

13. An active matrix device comprising:

a plurality of gate lines extending in parallel and formed over a substrate;

a plurality of source lines extending orthogonally to said plurality of gate lines and formed over the substrate;

a plurality of pixels surrounded by said plurality of gate lines and said plurality of source lines;

at least one thin film transistor formed in each of said plurality of pixels, wherein a gate of said thin film transistor is connected to one of said plurality of gate lines and a source of said thin film transistor is connected to one of said plurality of source lines;

a pixel electrode formed over said thin film transistor in each of said plurality of pixels wherein said pixel electrode is electrically connected to the associated thin film transistor;

an orientation film formed on said pixel electrode wherein a surface of the orientation film has been rubbed in one direction from one corner of the pixel; and

an auxiliary capacitor electrically connected to the thin film transistor in parallel with the pixel electrode wherein said auxiliary capacitor has a light shielding property and covers an active region of the thin film transistor,

wherein said auxiliary capacitor is positioned so as to cover a part of said pixel including said one corner thereof.

14. A device according to claim 13 wherein said thin film transistor is a top-gate type.

15. A device according to claim 13 wherein said thin film transistor is a bottom-gate type.

16. An active matrix device comprising:

a plurality of gate lines extending in parallel and formed over a substrate;

a plurality of source lines extending orthogonally to said plurality of gate lines and formed over the substrate;

a plurality of pixels surrounded by said plurality of gate lines and said plurality of source lines;

at least one thin film transistor formed in each of said plurality of pixels;

a pixel electrode formed over said thin film transistor in each of said plurality of pixels wherein said pixel electrode is electrically connected to the associated thin film transistor through a metal interconnect;

an orientation film formed on said pixel electrode wherein a surface of the orientation film has been rubbed in one direction from one corner of the pixel;

a black matrix formed above said thin film transistor and below said pixel electrode, said black matrix comprising a light shielding conductive film; and

an auxiliary capacitor formed between said black matrix and said metal interconnect in each of said pixels,

wherein said auxiliary capacitor is positioned so as to cover a part of said pixel including said one corner thereof.

17. A device according to claim 16 wherein said thin film transistor is a top-gate type.

18. A device according to claim 16 wherein said thin film transistor is a bottom-gate type.

19. A device according to claim 16 wherein said thin film transistor is a multi-gate type.

20. A device according to claim 16 wherein each of said pixels has a rectangular shape.

21. A device according to claim 16 wherein said auxiliary capacitor has an insulating film interposed between said black matrix and said metal interconnect.