Fingerprint sensor including an anisotropic dielectric coating and associated methods

• US 6,088,471 A
• Filed: 05/16/1997
• Issued: 07/11/2000
• Est. Priority Date: 05/16/1997
• Status: Expired due to Term

• Current Assignee: Apple Inc.
• Original Assignee: AuthenTec Incorporated (Apple Inc.)
• Inventors: Van Vonno, Nicolass W., Salatino, Matthew M., Setlak, Dale R., Newton, Mike
• Primary Examiner(s): Au, Amelia
• Assistant Examiner(s): Bali, Vikkram
• Application Number:
  US08/858,005
• Time in Patent Office: 1,152 Days
• Field of Search: 382/115, 382/116, 382/124, 382/125, 382/126, 340/825.3, 283/67, 283/68, 283/69, 430/286.1
• US Class Current: 382/124
• CPC Class Codes: A61B 5/0531 Measuring skin impedance
• CPC Class Codes: A61B 5/1172 using fingerprinting
• CPC Class Codes: G06V 40/1329 Protecting the fingerprint sensor against damage caused by the finger

Abstract

A fingerprint sensor includes an integrated circuit die and a protective covering of a z-axis anisotropic dielectric material. The die includes a conductive layer defining an array of electric field sensing electrodes. The z-axis anisotropic dielectric layer focusses an electric field at each of the electric field sensing electrodes. In other words, the dielectric covering may be relatively thick, but not result in defocussing of the electric fields propagating through the dielectric covering because of the z-axis anisotropy of the material. The z-axis anisotropic dielectric layer may be provided by a plurality of oriented dielectric particles in a cured matrix. For example, the z-axis anisotropic dielectric layer may comprise barium titanate in a polyimide matrix. The conductive layer preferably comprises a plurality of capacitive coupling pads for permitting capacitive coupling with the integrated circuit die. Accordingly, the dielectric covering is preferably continuous over the capacitive coupling pads and the array of electric field sensing electrodes. The z-axis dielectric layer also advantageously reduces cross-talk between adjacent capacitive coupling pads.

Claims

1. A fingerprint sensor comprising:

an integrated circuit die comprising at least one conductive layer defining an array of electric field sensing electrodes for sensing a fingerprint; and

a dielectric covering adjacent the array of electric field sensing electrodes of said integrated circuit die and for contact by a finger, said dielectric covering comprising a z-axis anisotropic dielectric layer for focussing an electric field at each of the electric field sensing electrodes, the z-axis being normal to the at least one conductive layer.

2. A fingerprint sensor according to claim 1 wherein said z-axis anisotropic dielectric layer defines an outermost protective surface for said integrated circuit die.

3. A fingerprint sensor according to claim 1 wherein said z-axis anisotropic dielectric layer has a thickness in range of about 0.0001 to 0.004 inches.

4. A fingerprint sensor according to claim 1 wherein said z-axis anisotropic dielectric layer is chemically resistant and mechanically strong.

5. A fingerprint sensor according to claim 1 wherein said z-axis anisotropic dielectric layer comprises a plurality of oriented dielectric particles in a cured matrix.

6. A fingerprint sensor according to claim 1 wherein said z-axis anisotropic dielectric layer comprises barium titanate in a polyimide matrix.

7. A fingerprint sensor according to claim 1 wherein said z-axis anisotropic layer comprises an array of high dielectric portions aligned with corresponding electric field sensing electrodes, and a matrix of low dielectric portions surrounding the high dielectric portions.

8. A fingerprint sensor according to claim 1 wherein said dielectric covering further comprises at least one relatively thin layer of an oxide, nitride, carbide, and diamond on said integrated circuit die and beneath said z-axis anisotropic dielectric layer.

9. A fingerprint sensor according to claim 1 wherein said at least one conductive layer comprises a plurality of capacitive coupling pads for permitting capacitive coupling with said integrated circuit die;

and wherein said dielectric covering is continuous over said capacitive coupling pads and the array of electric field sensing electrodes whereby the z-axis dielectric layer reduces cross-talk between adjacent capacitive coupling pads.

10. A fingerprint sensor according to claim 1 further comprising a package surrounding said integrated circuit die and dielectric covering, and wherein said package has an opening aligned with the array of electric field sensing electrodes.

11. A fingerprint sensor according to claim 10 further comprising at least one finger contacting electrode carried by said package and electrically connected to said integrated circuit die.

12. A sensor comprising:

an integrated circuit die comprising at least one conductive layer defining an array of electric field sensing electrodes and a plurality of capacitive coupling pads; and

a dielectric covering adjacent the array of electric field sensing electrodes and said capacitive coupling pads of said integrated circuit die, said dielectric covering comprising a z-axis anisotropic dielectric layer for focussing an electric field at each of the electric field sensing electrodes and for reducing cross-talk between adjacent capacitive coupling pads, the z-axis being normal to the at least one conductive layer.

13. A sensor according to claim 12 wherein said z-axis anisotropic dielectric layer defines an outermost protective surface for said integrated circuit die.

14. A sensor according to claim 12 wherein said z-axis anisotropic dielectric layer has a thickness in range of about 0.0001 to 0.004 inches.

15. A sensor according to claim 12 wherein said z-axis anisotropic dielectric layer is chemically resistant and mechanically strong.

16. A sensor according to claim 12 wherein said z-axis anisotropic dielectric layer comprises a plurality of oriented dielectric particles in a cured matrix.

17. A sensor according to claim 12 wherein said z-axis anisotropic dielectric layer comprises barium titanate in a polyimide matrix.

18. A sensor according to claim 12 wherein said z-axis anisotropic layer comprises an array of high dielectric portions aligned with corresponding electric field sensing electrodes, and a matrix of low dielectric portions surrounding the high dielectric portions.

19. A sensor according to claim 12 wherein said dielectric covering further comprises at least one relatively thin layer of an oxide, nitride, carbide, and diamond on said integrated circuit die and beneath said z-axis anisotropic dielectric layer.

20. A sensor according to claim 12 further comprising a package surround said integrated circuit die and dielectric covering, and wherein said package has an opening aligned with the array of electric field sensing electrodes.

21. A sensor according to claim 12 further comprising at least one finger contacting electrode carried by said package and electrically connected to said integrated circuit die so that the sensor is a fingerprint sensor.

22. A integrated circuit comprising:

an integrated circuit die comprising at least one conductive layer defining a plurality of capacitive coupling pads; and

a dielectric covering adjacent said capacitive coupling pads of said integrated circuit die, said dielectric covering comprising a z-axis anisotropic dielectric layer for reducing cross-talk between adjacent capacitive coupling pads, the z-axis being normal to the at least one conductive layer.

23. An integrated circuit according to claim 22 wherein said z-axis anisotropic dielectric layer defines an outermost protective surface for said integrated circuit die.

24. An integrated circuit according to claim 22 wherein said z-axis anisotropic dielectric layer has a thickness in range of about 0.0001 to 0.004 inches.

25. A integrated circuit according to claim 22 wherein said z-axis anisotropic dielectric layer is chemically resistant and mechanically strong.

26. An integrated circuit according to claim 22 wherein said z-axis anisotropic dielectric layer comprises a plurality of oriented dielectric particles in a cured matrix.

27. An integrated circuit according to claim 22 wherein said z-axis anisotropic dielectric layer comprises barium titanate in a polyimide matrix.

28. A integrated circuit according to claim 22 wherein said z-axis anisotropic layer comprises an array of high dielectric portions aligned with corresponding electric field sensing electrodes, and a matrix of low dielectric portions surrounding the high dielectric portions.

29. An integrated circuit according to claim 22 wherein said dielectric covering further comprises at least one relatively thin layer of an oxide, nitride, carbide, and diamond on said integrated circuit die and beneath said z-axis anisotropic dielectric layer.

30. An integrated circuit according to claim 22 further comprising a package surrounding said integrated circuit die and dielectric covering.

31. A integrated circuit comprising:

an integrated circuit die; and

a dielectric covering adjacent said integrated circuit die, said dielectric covering comprising a z-axis anisotropic dielectric layer, the z-axis being normal to the integrated circuit die.

32. An integrated circuit according to claim 31 wherein said z-axis anisotropic dielectric layer defines an outermost protective surface for said integrated circuit die.

33. An integrated circuit according to claim 31 wherein said z-axis anisotropic dielectric layer has a thickness in range of about 0.0001 to 0.004 inches.

34. An integrated circuit according to claim 31 wherein said z-axis anisotropic dielectric layer is chemically resistant and mechanically strong.

35. An integrated circuit according to claim 31 wherein said z-axis anisotropic dielectric layer comprises a plurality of oriented dielectric particles in a cured matrix.

36. An integrated circuit according to claim 31 wherein said z-axis anisotropic dielectric layer comprises barium titanate in a polyimide matrix.

37. An integrated circuit according to claim 31 wherein said z-axis anisotropic layer comprises an array of high dielectric portions aligned with corresponding electric field sensing electrodes, and a matrix of low dielectric portions surrounding the high dielectric portions.

38. An integrated circuit according to claim 31 wherein said dielectric covering further comprises at least one relatively thin layer of an oxide, nitride, carbide, and diamond on said integrated circuit die and beneath said z-axis anisotropic dielectric layer.

39. An integrated circuit according to claim 31 further comprising a package surrounding said integrated circuit die and dielectric covering.

40. A method for making a fingerprint sensor comprising the steps of:

forming an integrated circuit die comprising at least one conductive layer defining an array of electric field sensing electrodes for sensing a fingerprint; and

forming a dielectric covering adjacent the array of electric field sensing electrodes of the integrated circuit die and for contact by a finger, the dielectric covering comprising a z-axis anisotropic dielectric layer for focussing an electric field at each of the electric field sensing electrodes, the z-axis being normal to the at least one conductive layer.

41. A method according to claim 40 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic dielectric layer defines an outermost protective surface for the integrated circuit die.

42. A method according to claim 40 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic dielectric layer has a thickness in range of about 0.0001 to 0.004 inches.

43. A method according to claim 40 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic dielectric layer is chemically resistant and mechanically strong.

44. A method according to claim 40 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic dielectric layer comprises a plurality of oriented dielectric particles in a cured matrix.

45. A method according to claim 40 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic dielectric layer comprises barium titanate in a polyimide matrix.

46. A method according to claim 40 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic layer comprises an array of high dielectric portions aligned with corresponding electric field sensing electrodes, and a matrix of low dielectric portions surrounding the high dielectric portions.

47. A method according to claim 40 wherein the dielectric covering further comprises at least one relatively thin layer of an oxide, nitride, carbide, and diamond on the integrated circuit die and beneath the z-axis anisotropic dielectric layer.

48. A method according to claim 40 wherein the step of forming the at least one conductive layer further comprises forming same to include a plurality of capacitive coupling pads for permitting capacitive coupling with the integrated circuit die;

and wherein the step of forming the dielectric covering comprises forming same to be continuous over the capacitive coupling pads and the array of electric field sensing electrodes whereby the z-axis dielectric layer reduces cross-talk between adjacent capacitive coupling pads.

49. A method according to claim 40 further comprising the step of forming a package surrounding the integrated circuit die and dielectric covering, and wherein the package has an opening aligned with the array of electric field sensing electrodes.

50. A method of making an integrated circuit comprising:

providing an integrated circuit die; and

forming a dielectric covering adjacent the integrated circuit die, the dielectric covering comprising a z-axis anisotropic dielectric layer, the z-axis being normal to the integrated circuit die.

51. A method according to claim 50 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic dielectric layer defines an outermost protective surface for the integrated circuit die.

52. A method according to claim 50 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic dielectric layer has a thickness in range of about 0.0001 to 0.004 inches.

53. A method according to claim 50 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic dielectric layer is chemically resistant and mechanically strong.

54. A method according to claim 50 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic dielectric layer comprises a plurality of oriented dielectric particles in a cured matrix.

55. A method according to claim 50 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic dielectric layer comprises barium titanate in a polyimide matrix.

56. A method according to claim 50 wherein the step of forming the dielectric covering comprises forming same so that the z-axis anisotropic layer comprises an array of high dielectric portions aligned with corresponding electric field sensing electrodes, and a matrix of low dielectric portions surrounding the high dielectric portions.

57. A method according to claim 50 wherein the dielectric covering further comprises at least one relatively thin layer of an oxide, nitride, carbide, and diamond on the integrated circuit die and beneath the z-axis anisotropic dielectric layer.

58. A method according to claim 50 further comprising the step of forming a package surrounding the integrated circuit die and dielectric covering.