Linear capacitor and process for making same

• US 6,090,656 A
• Filed: 05/08/1998
• Issued: 07/18/2000
• Est. Priority Date: 05/08/1998
• Status: Expired due to Term

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Randazzo, Todd A.
• Primary Examiner(s): Wilczewski, Mary
• Assistant Examiner(s): Thomas, Toniae M.
• Application Number:
  US09/074,837
• Time in Patent Office: 802 Days
• Field of Search: 438/200, 438/210, 438/233, 438/238, 438/250, 438/393, 438/396, 438/239, 438/253
• US Class Current: 438/239
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 28/60 Electrodes

Abstract

A capacitor that is a metal to polysilicon capacitor. The capacitor is fabricated by forming a field oxide layer on a substrate. Then, a polysilicon segment is formed on the field oxide layer. This polysilicon segment forms a polysilicon bottom plate for the capacitor. A dielectric layer is formed and planarized. An opening is made in the dielectric layer to expose a portion of the polysilicon segment. Then, an oxide layer is formed on exposed portions of the polysilicon segment. A metal segment is formed on the oxide layer over the opening, wherein the metal segment forms a top-plate for the semiconductor device.

Claims

1. A method for forming a metal-to-polysilicon capacitor, in and on a silicon substrate, on an integrated circuit having MOSFET devices, comprising:

forming a field oxide layer on the substrate;

forming a polysilicon segment on the field oxide layer;

forming a first dielectric layer on the field oxide layer and the polysilicon segment, wherein an opening is present in the first dielectric layer to expose a portion of the polysilicon segment;

doping a portion of the polysilicon segment through the opening;

forming a second dielectric layer on the polysilicon segment exposed in the opening and on the first dielectric layer wherein a portion of the polysilicon segment is out of contact with the second dielectric layer;

forming a contact to the portion of the polysilicon segment out of contact with the second dielectric layer; and

forming a metal segment on the second dielectric layer over the opening, wherein the metal segment forms a top-plate for the metal-to-polysilicon capacitor and polysilicon segment forms a bottom-plate for the metal-to-polysilicon capacitor.

2. The method of claim 1, wherein the field oxide layer has a thickness from about 2000 Angstroms to about 7000 Angstroms.

3. The method of claim 1, wherein the polysilicon segment has a thickness from about 1200 Angstroms to about 4000 Angstroms.

4. The method of claim 1, wherein the second dielectric layer has a thickness from about 100 Angstroms to about 400 Angstroms.

5. The method of claim 1, wherein the metal segment has a thickness from about 100 Angstroms to about 500 Angstroms.

6. The method of claim 1, wherein the first dielectric layer has a thickness from about 3000 Angstroms to about 13000 Angstroms.

7. A method for forming a metal-to-polysilicon capacitor, in and on a silicon substrate, on an integrated circuit having MOSFET devices, comprising:

forming a field oxide layer on the substrate;

forming a polysilicon segment on the field oxide layer;

forming a first dielectric layer on the field oxide layer and the polysilicon segment, wherein an opening is present in the first dielectric layer to expose a portion of the polysilicon segment;

doping a portion of the polysilicon segment through the opening;

forming a second dielectric layer on the polysilicon segment exposed in the opening and on the first dielectric layer;

forming a barrier metal layer on the second dielectric layer over the opening; and

forming a first metal segment on the barrier metal layer wherein the first metal

segment forms a top-plate for the metal-to-polysilicon

capacitor and polysilicon segment forms a bottom-plate for the metal-to-polysilicon capacitor.

8. The method of claim 7 further comprising:

forming a hole in the first dielectric layer to the polysilicon segment;

depositing a metal into the hole thereby forming a metal plug;

forming a metal contact on top of the metal plug.

9. The method of claim 7, wherein the field oxide layer has a thickness from about 2000 Angstroms to about 7000 Angstroms.

10. The method of claim 7, wherein the polysilicon segment has a thickness from about 1200 Angstroms to about 4000 Angstroms.

11. The method of claim 7, wherein the second dielectric layer has a thickness from about 100 Angstroms to about 400 Angstroms.

12. The method of claim 7, wherein the metal segment has a thickness from about 100 Angstroms to about 500 Angstroms.

13. The method of claim 7, wherein the first dielectric layer has a thickness from about 3000 Angstroms to about 13000 Angstroms.

14. The method of claim 7, wherein the barrier metal layer has a thickness from about 100 Angstroms to about 500 Angstroms.