Insulated gate thyristor
First Claim
1. An insulated gate thyristor comprising;
- a first-conductivity-type base layer;
first and second second-conductivity-type base regions formed in selected areas of a surface layer of a first major surface of said first-conductivity-type base layer, said first second-conductivity-type base region including a second-conductivity-type well region;
a first-conductivity-type source region formed in a selected area of a surface layer of said first second-conductivity-type base region;
a first-conductivity-type emitter region formed in a selected area of a surface layer of said second second-conductivity-type base region;
a gate electrode formed through a gate insulating film on a surface of said first second-conductivity-type base region, an exposed portion of said first-conductivity-type base layer, and a surface of said second second-conductivity-type base region, which surfaces and exposed portion are interposed between said first-conductivity-type source region and said first-conductivity-type emitter region;
a first main electrode that contacts both an exposed portion of said first second-conductivity-type base layer and said first-conductivity-type source region;
a second-conductivity-type emitter layer formed on a second surface of said first-conductivity-type base layer;
a second main electrode that contacts said second-conductivity-type emitter layer; and
an insulating film covering entire areas of surfaces of said second second-conductivity-type base region and said first-conductivity-type emitter region;
whereinsaid second second-conductivity-type base region has a diffusion depth that is smaller than a larger one of diffusion depths of said first second-conductivity-type base region and said second-conductivity-type well region.
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Accused Products
Abstract
An insulated gate thyristor includes a first-conductivity-type base layer having a high resistivity, first and second second-conductivity-type base regions formed in a surface layer of the first-conductivity-type base layer, a first-conductivity-type source region formed in a surface layer of the first second-conductivity-type base region, and a first-conductivity-type emitter region formed in a surface layer of the second second-conductivity-type base region. The thyristor further includes a gate electrode formed through an insulating film on the first second-conductivity-type base region, an exposed portion of the first-conductivity-type base layer and the second second-conductivity-type base region, a first main electrode that contacts both the first second-conductivity-type base layer and first-conductivity-type source region, a second-conductivity-type emitter layer formed on the first-conductivity-type base layer, a second main electrode that contacts the second-conductivity-type emitter layer, and an insulating film covering entire areas of surfaces of the second second-conductivity-type base region and first-conductivity-type emitter region. The second second-conductivity-type base region has a diffusion depth that is greater than a larger one of diffusion depths of the first second-conductivity-type base region and a second-conductivity-type well region included in the first second-conductivity-type base region.
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Citations
46 Claims
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1. An insulated gate thyristor comprising;
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a first-conductivity-type base layer; first and second second-conductivity-type base regions formed in selected areas of a surface layer of a first major surface of said first-conductivity-type base layer, said first second-conductivity-type base region including a second-conductivity-type well region; a first-conductivity-type source region formed in a selected area of a surface layer of said first second-conductivity-type base region; a first-conductivity-type emitter region formed in a selected area of a surface layer of said second second-conductivity-type base region; a gate electrode formed through a gate insulating film on a surface of said first second-conductivity-type base region, an exposed portion of said first-conductivity-type base layer, and a surface of said second second-conductivity-type base region, which surfaces and exposed portion are interposed between said first-conductivity-type source region and said first-conductivity-type emitter region; a first main electrode that contacts both an exposed portion of said first second-conductivity-type base layer and said first-conductivity-type source region; a second-conductivity-type emitter layer formed on a second surface of said first-conductivity-type base layer; a second main electrode that contacts said second-conductivity-type emitter layer; and an insulating film covering entire areas of surfaces of said second second-conductivity-type base region and said first-conductivity-type emitter region;
whereinsaid second second-conductivity-type base region has a diffusion depth that is smaller than a larger one of diffusion depths of said first second-conductivity-type base region and said second-conductivity-type well region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. An insulated gate thyristor comprising;
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a first-conductivity-type base layer; first and second second-conductivity-type base regions formed in selected areas of a surface layer of a first major surface of said first-conductivity-type base layer; a first-conductivity-type source region formed in a selected area of a surface layer of said first second-conductivity-type base region; a first-conductivity-type emitter region formed in a selected area of a surface layer of said second second-conductivity-type base region; a gate electrode formed through a gate insulating film on a surface of said first second-conductivity-type base region, an exposed portion of said first-conductivity-type base layer, and a surface of said second second-conductivity-type base region, which surfaces and exposed portion are interposed between said first-conductivity-type source region and said first-conductivity-type emitter region; a first main electrode that contacts both an exposed portion of said first second-conductivity-type base layer and said first-conductivity-type source region; a second-conductivity-type emitter layer formed on a second surface of said first-conductivity-type base layer; a second main electrode that contacts said second-conductivity-type emitter layer; and an insulating film covering entire areas of surfaces of said second second-conductivity-type base region and said first-conductivity-type emitter region; and
whereinsaid second second-conductivity-type base region has a surface impurity concentration that is lower than that of said first second-conductivity-type base region. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22)
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23. An insulated gate thyristor comprising;
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a first-conductivity-type base layer; first and second second-conductivity-type base regions formed in selected areas of a surface layer of a first major surface of said first-conductivity-type base layer; a first-conductivity-type source region formed in a selected area of a surface layer of said first second-conductivity-type base region; a first-conductivity-type emitter region formed in a selected area of a surface layer of said second second-conductivity-type base region; a gate electrode formed through a gate insulating film on a surface of said first second-conductivity-type base region, an exposed portion of said first-conductivity-type base layer, and a surface of said second second-conductivity-type base region, which surfaces and exposed portion are interposed between said first-conductivity-type source region and said first-conductivity-type emitter region; a first main electrode that contacts both an exposed portion of said first second-conductivity-type base layer and said first-conductivity-type source region; a second-conductivity-type emitter layer formed on a second surface of said first-conductivity-type base layer; a second main electrode that contacts said second-conductivity-type emitter layer; and an insulating film covering entire areas of surfaces of said second second-conductivity-type base region and said first-conductivity-type emitter region;
whereinsaid first-conductivity-type source region comprises a first region having a first surface impurity concentration, and a second region having a second surface impurity concentration that is lower than said first surface impurity concentration, said first main electrode being in contact with a surface of said first region having a higher surface impurity concentration than said second region. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30)
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31. An insulated gate thyristor comprising;
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a first-conductivity-type base layer; first and second second-conductivity-type base regions formed in selected areas of a surface layer of a first major surface of said first-conductivity-type base layer; a first-conductivity-type source region formed in a selected area of a surface layer of said first second-conductivity-type base region; a first-conductivity-type emitter region formed in a selected area of a surface layer of said second second-conductivity-type base region; a gate electrode formed through a gate insulating film on a surface of said first second-conductivity-type base region, an exposed portion of said first-conductivity-type base layer, and a surface of said second second-conductivity-type base region, which surfaces and exposed portion are interposed between said first-conductivity-type source region and said first-conductivity-type emitter region; a first main electrode that contacts both an exposed portion of said first second-conductivity-type base layer and said first-conductivity-type source region; a second-conductivity-type emitter layer formed on a second surface of said first-conductivity-type base layer; a second main electrode that contacts said second-conductivity-type emitter layer; an insulating film covers entire areas of surfaces of said second second-conductivity-type base region and said first-conductivity-type emitter region; and a first-conductivity-type auxiliary region formed in the exposed portion of said first-conductivity-type base layer between said first and second second-conductivity-type base regions, said first-conductivity-type auxiliary region having an impurity concentration that is higher than that of said first-conductivity-type base layer, and a diffusion depth that is smaller than those of the first and second second-conductivity-type base regions. - View Dependent Claims (32, 33, 34, 35, 36, 37, 38)
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39. An insulated gate thyristor comprising;
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a first-conductivity-type base layer; first and second second-conductivity-type base regions formed in selected areas of a surface layer of a first major surface of said first-conductivity-type base layer; a first-conductivity-type source region formed in a selected area of a surface layer of said first second-conductivity-type base region; a first-conductivity-type emitter region formed in a selected area of a surface layer of said second second-conductivity-type base region; a gate electrode formed through a gate insulating film on a surface of said first second-conductivity-type base region, an exposed portion of said first-conductivity-type base layer, and a surface of said second second-conductivity-type base region, which surfaces and exposed portion are interposed between said first-conductivity-type source region and said first-conductivity-type emitter region; a first main electrode that contacts both an exposed portion of said first second-conductivity-type base layer and said first-conductivity-type source region; a second-conductivity-type emitter layer formed on a second surface of said first-conductivity-type base layer; a second main electrode that contacts said second-conductivity-type emitter layer; and an insulating film covering entire areas of surfaces of said second second-conductivity-type base region and said first-conductivity-type emitter region;
whereina first part of said gate insulating film on the exposed portion of said first-conductivity-type base layer which is interposed between two of said first second-conductivity-type base region has a thickness that is greater than a second part of the gate insulating film on the exposed portion of the first-conductivity-type base layer which is interposed between said first and second second-conductivity-type base regions. - View Dependent Claims (40, 41, 42, 43, 44, 45, 46)
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Specification