ATM switch core

• US 6,091,728 A
• Filed: 11/03/1997
• Issued: 07/18/2000
• Est. Priority Date: 05/09/1995
• Status: Expired due to Term

• Current Assignee: Telefonaktiebolaget LM Ericsson
• Original Assignee: Telefonaktiebolaget LM Ericsson
• Inventors: Lazraq, Tawfik, Tenhunen, Hannu, Bergstedt, P., Mikhtari, Mehran
• Primary Examiner(s): Olms, Douglas W.
• Assistant Examiner(s): VANDERPUYE, KENNETH N
• Application Number:
  US08/962,870
• Time in Patent Office: 988 Days
• Field of Search: 370/386, 370/395, 370/409, 370/423, 370/385, 370/410, 370/522, 370/384, 370/412, 370/413, 370/415, 370/391, 370/360, 370/369, 370/370, 370/371, 370/380, 370/381, 370/389 , 370/375, 370/535, 370/376, 370/377, 370/378, 370/388
• US Class Current: 370/395.7
• CPC Class Codes: H04L 12/5601 Transfer mode dependent, e.g. ATM
• CPC Class Codes: H04L 2012/5672 Multiplexing, e.g. coding, scrambling
• CPC Class Codes: H04L 2012/5674 Synchronisation, timing recovery or alignment
• CPC Class Codes: H04L 49/255 Control mechanisms for ATM switching fabrics
• CPC Class Codes: H04L 49/256 Routing or path finding in ATM switching fabrics

Abstract

An ATM-switch for high transmission rates is built of primary switch cores. A path for a cell through the switch is determined at the arrival of the cell at the switch and this path is coded as a control word, which is transferred through the switch in parallel to the cell itself. The control word indicates directly how the transfer through each primary element of the switch is to be made. Each primary element must only have two inputs and two outputs. The control word then consists of one bit for every stage of primary switch elements in the switch and this bit indicates directly the output from which the cell is to be forwarded from a considered switch element. The switch cores are constructed of intermediate storage memories, one for each pair of one input and one output, and these intermediate storage memories can have a rather limited capacity for storing only a few cells together with their associated control words. The control word indicates to a cell arriving at an input the intermediate storage memory, where the cell is to be intermediately stored. The intermediate storage memories can be shift registers and independent units take care of the storing of cells and the forwarding of cells from the switch core.

Claims

1. A switching network for transfer of data cells, comprising

at least one input port, on which cells arrive to the switching network,

a number of output ports, on which cells are forwarded from the switching network,

primary switch units having inputs and outputs, which are so connected to each other by suitable lines and so connected through suitable lines to input ports and output ports, that a cell arriving to an input port of the network can be forwarded from a selectable output port of the network,

that the at least one input port is arranged so that at arrival of a cell to the input port a path is determined for the cell through the switching network to an output port and therefrom a control word, by which the path is coded,

additional lines between input ports and output ports and between the primary switch units themselves are provided for transferring the control word in parallel to the cell through the switching network.

2. A switching network according to claim 1, wherein for an input of a primary switch unit a selector is provided, which is connected to receive a control word and to get information therefrom in regard of the output of the switch unit the cell that is arriving in parallel to the control word is to be transferred.

3. A switching network according to claim 2, wherein the selector in all primary switch units is arranged to get the information from the same position in the control word.

4. A switch unit for transfer of data cells, comprising inputs and outputs, wherein

each input comprises a line for receiving a cell and a line for receiving a control word,

each output comprises a line for forwarding a cell and a line for forwarding a control word,

the line to an input arranged for the control word is connected to a selector,

the selector is arranged to get information from a received control word and to transmit, as guided thereby, a signal to only one of several intermediate storage memories connected to the selector for receiving the data cell associated with the control word.

5. A switch unit according to claim 4, wherein the selector is arranged to get the information from predetermined positions in a received control word.

6. A switch unit according to claim 4, wherein that with each intermediate storage memory for cells is associated an intermediate storage memory for control words that is arranged for storing intermediately control words that are transferred in parallel to the data cells and include information on the paths thereof through the switch.

7. A switch unit according to claim 4, wherein an intermediate storage memory for data cells comprises

at least two shift registers operating in parallel with each other, and

a control unit for transferring a data cell that is to stored in the intermediate storage memory to an empty or free shift register.

8. A switch unit according claim 7, wherein

an intermediate storage memory for control words comprises shift registers operating in parallel with each other each of these shift registers being associated with a corresponding shift register for data cells, and

the control unit for transferring data cells to the intermediate storage memory for cells associated with an intermediate storage memory for control words is arranged to transfer, simultaneously with transfer of a data cell to an empty or free shift register in the intermediate storage memory for cells, a control word associated with the cell to a corresponding shift register included in the intermediate storage memory for control words.

9. A switch unit for transfer of data cells, comprising at least two inputs and at least two outputs, and further comprising

intermediate storage memories for each input and for storing intermediately data cells,

control devices arranged, so that a cell arriving at an input can be stored in one of the intermediate storage memories associated with the input and so that a cell stored in an intermediate storage memory can be forwarded from the intermediate storage memory,

wherein with each intermediate storage memory for cells is associated an intermediate storage memory for control words that is arranged for storing intermediately control words which are transferred in parallel to the data cells and include information on the paths thereof through the switch unit.

10. A switch unit according to claim 9, wherein an intermediate storage memory for data cells comprises

at least two shift registers operating in parallel with each other, and

a control unit for transferring a data cell that is to stored in the intermediate storage memory to an empty or free shift register.

11. A switch unit according claim 10, wherein

an intermediate storage memory for control words comprises shift registers operating in parallel with each other, each of these shift registers being associated with a corresponding shift register for data cells, and

the control unit for transferring data cells to the intermediate storage memory for cells associated with an intermediate storage memory for control words is arranged to transfer, simultaneously with transfer of a data cell to an empty or free shift register in the intermediate storage memory for cells, a control word associated with the cell to a corresponding shift register included in the intermediate storage memory for control words.

15. A switch unit according to claim 9, further comprising switching units included in the control devices wherein an individual, independently operating switching unit is provided for each input and is arranged to select one of the intermediate storage memories, which are associated with an output, in order that a call from the selected intermediate storage memory will be transmitted from the output.

16. A switch unit according to claim 9, further comprising input control devices included in the control devices an individual, independently operating input control device being provided for each input and arranged to guide a cell arriving at the input to only one of the intermediate storage memories, which are associated with this input.

12. A switch unit for transfer of data cells, the switch unit comprising:

for each input, a plurality of intermediate storage memories for storing intermediately data cells arriving at the switch unit,

control devices arranged for storing a cell arriving at an input in one of the intermediate storage memories associated with the input and for forwarding a cell stored in an intermediate storage memory from the intermediate storage memory,

wherein each intermediate storage memory for data cells comprises

at least two shift registers operating in parallel with each other, and

wherein the control devices are configured for transferring a data cell that is to be stored in the intermediate storage memory to an empty or free one of the at least two shift register,,s of the intermediate storage memory.

13. A switch unit according to claim 12, further comprising switching units included in the control devices, wherein an individual, independently operating switching unit is provided for each input and is arranged to select one of the intermediate storage memories, which are associated with an output, in order that a cell from the selected intermediate storage memory will be transmitted from the output.

14. A switch unit according to claim 12, further comprising input control devices included in the control devices, an individual, independently operating input control device being provided for each of input and arranged to guide a cell arriving at the input to only one of the intermediate storage memories, which are associated with this input.