Method of manufacturing inductor device on a silicon substrate thereof
First Claim
1. A manufacturing method of an inductor on a silicon substrate, comprising steps of:
- forming first insulating layer on the silicon substrate, and then forming trench substrate having two or more trenches by etching selected areas in said silicon substrate using a mask, and then removing the first insulating layer so that said trench substrate is exposed;
forming second insulating layer by applying oxidation process on said trench substrate;
depositing undoped polycrystalline silicon on the entire structure of said trench substrate, and then polishing said polycrystalline silicon to the surface of said second insulating layer by the chemical and mechanical polishing method;
depositing third insulating layer and a metal layer successively on the trench substrate where said polycrystalline silicon is filled, and then forming first metal line by an etching process using a mask; and
depositing fourth insulating layer on said first metal line, forming via holes by an etching process using a mask on selected areas of said fourth insulating layer, depositing metal layer, and then forming second metal line by an etching process using a mask.
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Abstract
The present invention relates to a on silicon substrate, specifically to an inductor device and manufacturing method thereof for enhancing the quality factor of the inductor by disposing trenches on a silicon substratre, and by filling the inside of the trenches with polycrystalline polysilicon not doped with impurities. The present invention provides an inductor device and a manufacturing method thereof which can improve the quality factor by increasing resistance of the substrate by forming deep trenches disposed in specific patterns on a low-resistance silicon substrate and filling polycrystalline silicon not doped with impurities, and by reducing parasitic capacitance between the inductor and the silicon substrate.
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Citations
15 Claims
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1. A manufacturing method of an inductor on a silicon substrate, comprising steps of:
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forming first insulating layer on the silicon substrate, and then forming trench substrate having two or more trenches by etching selected areas in said silicon substrate using a mask, and then removing the first insulating layer so that said trench substrate is exposed; forming second insulating layer by applying oxidation process on said trench substrate; depositing undoped polycrystalline silicon on the entire structure of said trench substrate, and then polishing said polycrystalline silicon to the surface of said second insulating layer by the chemical and mechanical polishing method; depositing third insulating layer and a metal layer successively on the trench substrate where said polycrystalline silicon is filled, and then forming first metal line by an etching process using a mask; and depositing fourth insulating layer on said first metal line, forming via holes by an etching process using a mask on selected areas of said fourth insulating layer, depositing metal layer, and then forming second metal line by an etching process using a mask. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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Specification
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- Resources
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Current AssigneeElectronics and Telecommunications Research Institute
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Original AssigneeElectronics and Telecommunications Research Institute
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InventorsKim, Bo Woo, Nam, Kee Soo, Rhee, Heung Soo, Lee, Jin Hyo, Yu, Hyun Kyu
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Primary Examiner(s)TSAI, H JEY
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Application NumberUS09/232,691Time in Patent Office553 DaysField of Search438/238, 438/381, 438/622-625US Class Current438/238CPC Class CodesH01L 21/763 Polycrystalline semiconduct...H01L 27/08 including only semiconducto...
