Method and apparatus for detecting an RFID tag signal

• US 6,094,173 A
• Filed: 04/18/1997
• Issued: 07/25/2000
• Est. Priority Date: 04/18/1997
• Status: Expired due to Term

• Current Assignee: Assa Abloy AB
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Nylander, Frederick Arnold
• Primary Examiner(s): Kim, Robert H.
• Assistant Examiner(s): Lauchman, Layla G.
• Application Number:
  US08/844,123
• Time in Patent Office: 1,194 Days
• Field of Search: 343/742, 343/741, 343/867, 343/866, 343/853, 340/572
• US Class Current: 343/742
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
• CPC Class Codes: G06K 7/10336 the antenna being of the near field type, inductive coil
• CPC Class Codes: G06K 7/10346 the antenna being of the far field type, e.g. HF types or dipoles
• CPC Class Codes: H01Q 1/2216 used in interrogator/reader equipment
• CPC Class Codes: H01Q 11/12 Resonant antennas

Abstract

An antenna array for detecting a coded radio frequency identification (RFID) tag signal generated by a tag during passage of the tag through a detection volume, or portal. The array comprises at least first and second antennas disposed at different positions around the periphery of the detection volume, and circuitry, having inputs connected to receive the respective output signals from the first and second antennas and an output connected to a signal receiver for decoding the detected signal. The circuitry provides an output signal including the respective output signals of the first and second antennas, and the sum of the output signals of the first and second antennas. Preferably, the output signal of the circuitry additionally includes the inverse of the output signal of the second antenna, and the sum of the output signal of the first antenna and the inverse of the output signal of the second antenna.

Claims

1. An antenna array for detecting a coded radio frequency identification tag signal generated by a tag during passage of the tag through a detection volume, the antenna array comprising:

first and second antennas disposed at different positions around a periphery of the detection volume; and

,

circuit means, having inputs connected to receive respective output signals from the first and second antennas, for providing an output signal that includes respective output signals of said first and second antennas and a sum of the output signals of said first and second antennas.

2. The antenna array defined in claim 1, wherein the output signal of said circuit means additionally includes an inverse of the output signal of the second antenna, and a sum of the output signal of the first antenna and the inverse of the output signal of the second antenna.

3. The antenna array defined in claim 1, wherein said detection volume is rectangular in cross section and said first and second antennas are disposed on adjacent sides of the rectangular cross section.

4. The antenna array defined in claim 1, wherein said detection volume is rectangular in cross-section and said first and second antennas are disposed on opposite sides of the detection volume.

5. The antenna array defined in claim 4, wherein said first and second antennas are planar coils that are positioned substantially parallel to each other.

6. The antenna array defined in claim 5, wherein said first and second antenna coils are positioned substantially perpendicular to a plane defined by the rectangular cross section of the detection volume.

7. The antenna array defined in claim 1, wherein said circuit means comprises:

a time division multiplexer having first and second inputs connected, respectively, to the first and second antennas, and an output connected to a signal receiver; and

a control circuit for providing control signals to the multiplexer to thereafter cause the time division multiplexer to provide a multiplexer output signal including the respective output signals of said first and second antennas and the sum of the output signals of said first and second antennas.

8. The antenna array defined in claim 7, wherein said control signals cause the time division multiplexer to cyclically, sequentially provide:

a) the output signal from the first antenna;

b) the sum of the output signals from the first and second antennas; and

c) the output signal of the second antenna.

9. The antenna array defined in claim 7, wherein:

the multiplexer includes a circuit arrangement for providing a signal that is the inverse of the output signal of the second antenna, the control circuit producing a further control signal for the multiplexer to cause the multiplexer to additionally cyclically provide the inverse of the output signal of the second antenna, and the sum of the output signal of the first antenna and the inverse of the output signal of the second antenna.

10. The antenna array defined in claim 9, wherein said control signals cause the multiplexer to cyclically, sequentially provide:

a) the output signal of the first antenna;

b) the sum of the output signals from the first and second antennas;

c) the output signal from the second antenna;

d) the output signal of the first antenna;

e) the sum of the output signals of the first antenna and the inverse of the output signal of the second antenna; and

f) the inverse of the output signal of the second antenna.

11. The antenna array defined in claim 7, wherein the time division multiplexer includes first and second switches each having a respective signal input connected to a respective one of said first and second antennas and a respective output connected to said multiplexer output, wherein said control signals include first and second control signals provided at respective outputs of the control circuit, and wherein said first and second control signals are used to enable said first and second switches, respectively.

12. The antenna array defined in claim 11, wherein the output of said second switch is connected to said multiplexer output via a further circuit that selectively supplies either one of the output signal of the second antenna and the inverse of the output signal of the second antenna to the multiplexer output, wherein said control circuit provides a third control signal for controlling said further circuit, so that one selected from the group of:

the output signal of the first antenna;

the output signal of the second antenna;

the sum of the output signals of the first and second antennas;

the inverse of the output signal of the second antenna; and

the sum of the output signal of the first antenna and the inverse of the output signal of the second antenna is cyclically provided at the multiplexer output.

13. The antenna array defined in claim 12, wherein said further circuit of said multiplexer includes third and fourth switches each having a signal input and a control input, the signal input of said third switch being directly connected to said output of said second switch, the signal input of said fourth switch being connected to said output of said second switch via a signal inverter circuit, the control input of said third switch being connected to receive the third control signal from said control circuit via an inverter, and the control input of said fourth switch being connected to receive the third control signal directly from said control circuit.

14. The antenna array defined in claim 1, wherein said first and second antennas include antenna coils, and said circuit means comprises a switching circuit arrangement connected to said first and second antenna coils, for cyclically, selectively connecting, to the output of the circuit means, one of the first antenna coil, the second antenna coil, and a combination of the first and second antenna coils connected in series-aiding.

15. The antenna array defined in claim 14, wherein said switching circuit arrangement additionally selectively connects, to the output of the circuit means, the first and second antenna coils connected in series-opposing.

16. The antenna array defined in claim 1, wherein said circuit means comprises:

a respective analog to digital converter connected to each of said antennas; and

a digital signal processor, connected to an output of each of said analog to digital converters, for cyclically providing, to a signal receiver, a digital output signal including the respective output signals of said first and second antennas and the sum of the output signals of said first and second antennas.

17. The antenna array defined in claim 16, wherein the digital signal processor additionally provides an inverse of the output signal of the second antenna, and a sum of the output signal of the first antenna and the inverse of the output signal of the second antenna.

18. The antenna array defined in claim 1, wherein a plurality of antennas are disposed at different positions around the periphery of the detection volume;

and

said circuit means receives respective output signals from each of the antennas and provides an output signal that provides, to a signal receiver, the respective output signals of each of the plurality of antennas and signals corresponding to a sum of the respective output signals of each of the plurality of antennas and the output signals of each other antenna.

19. The antenna array defined in claim 18, wherein the output signal of said circuit means additionally includes an inverse of the output signal of at least each of the plurality of antennas other than said first antenna, and a sum of the output signal of each antenna and the inverse of the output signal of each other antenna.

20. A method of detecting a radio frequency identification (RFID) tag signal generated by a tag, the method comprising the steps of:

providing a detection volume through which the tag is to be passed;

positioning a plurality of antennas around a periphery of the detection volume;

receiving output signals from the plurality of antennas;

summing at least one pair of output signals from the plurality of antennas; and

providing a multiplexed output that includes at least one antenna output signal and at least one antenna pair summed signal to a signal receiver for detecting the RFID tag signal.

21. The method of claim 20, further comprising the step of inverting at least one output signal from the plurality of antennas.

22. The method of claim 21, further comprising the steps of:

summing at least one antenna output signal with the inverted output signal to produce a difference output signal; and

providing the difference output signal to the signal receiver.