Method for transmitting data on viewable portion of a video signal

• US 6,094,228 A
• Filed: 03/23/1998
• Issued: 07/25/2000
• Est. Priority Date: 10/28/1997
• Status: Expired due to Term

• Current Assignee: Koplar Interactive International LLC
• Original Assignee: Koplar Interactive International LLC
• Inventors: Chupp, Christopher Eric, Ciardullo, Daniel Andrew, Kosbar, Kurt Louis
• Primary Examiner(s): Kostak, Victor R.
• Application Number:
  US09/046,413
• Time in Patent Office: 855 Days
• Field of Search: 348/473, 348/469, 348/478, 348/476, 348/553, 348/564
• US Class Current: 348/473
• CPC Class Codes: H04N 7/025 Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame transmission of digital non-picture data during the vertical blanking interval only H04N7/088
• CPC Class Codes: H04N 7/035 Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
• CPC Class Codes: H04N 7/08 Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band , e.g. by time division H04N7/007 takes precedence

Abstract

A method of encoding data in the visible portion of a transmitted video signal without degrading display of the received video signal, and for decoding the data in the received video signal. Each group of data bits to be transmitted, referred to a data symbol, is associated with one of a number of longer predetermined sequences of chips. Each chip sequence is divided into a multiplicity of lines of chips, and each line of chips together with its inverse are embedded, in pairwise fashion, in respective pairs of line scans of the video signal prior to its transmission. Received pairs of line scans are operated upon to detect the lines of chips they represent, and each of the number of chip sequences is correlated with the detected line of chips to derive a correlation magnitude. The chip sequence with the largest correlation magnitude is selected as the chip sequence whose data symbol was transmitted.

Claims

1. A method of superimposing data on the visible portion of a video signal comprising the steps of:

(a) converting an input video signal to a digital representation thereof;

(b) for each of a multiplicity of data symbols, assigning a respective chip pattern having more chips than the number of bits represented by said each data symbol, each chip pattern having a plurality of lines, each with a plurality of chips, to be superimposed on said video signal in paired lines having respective normal and inverse forms;

(c) developing a chip amplitude table having digital values that represent the values of respective chips to be superimposed on said video signal at corresponding positions thereof;

(d) deriving a digital representation of an output video signal by digitally adding the representation of said input video signal and the chip values represented in said chip amplitude table at the corresponding positions thereof;

(e) simulating the decoding of data superimposed on said output video signal by operating digitally on the digital representation derived in step (d);

(f) increasing values in said chip amplitude table if the simulated decoding of step (e) produces erroneous results; and

(g) after values in said chip amplitude table have been increased such that a simulated decoding of step (e) produces correct results, generating an output video signal from the digital representation of said input video signal and the chip values represented in said chip amplitude table at the corresponding positions thereof.

2. A method of superimposing data on the visible portion of an output video signal in accordance with claim 1 further comprising the step of:

(h) decoding said input video signal to derive a digital representation of any data superimposed thereon; and

wherein steps (d), (e) and (g) all include the additional utilization of the digital representation derived in step (h).

3. A method of superimposing data on the visible portion of an output video signal in accordance with claim 2 wherein in step (g) said chip amplitude table is used to include opposite polarity chips in paired lines in said output video signal.

4. A method of superimposing data on the visible portion of an output video signal in accordance with claim 3 wherein the decoding in steps (e) and (h) consists of deriving the difference of the integrals of the video signal operated upon over the course of each pair of opposite polarity chips, and statistically correlating each of said chip patterns with the integral differences to determine the highest correlation.

5. A method of superimposing data on the visible portion of an output video signal in accordance with claim 1 wherein in step (g) said chip amplitude table is used to include opposite polarity chips in paired lines in said output video signal.

6. A method of superimposing data on the visible portion of an output video signal in accordance with claim 5 wherein the decoding in step (e) consists of deriving the difference of the integrals of the output video signal operated upon over the course of each of a pair of opposite polarity chips, and statistically correlating each of said chip patterns with the integral differences to determine the highest correlation.

7. A method of superimposing data on the visible portion of an output video signal in accordance with claim 1 further including the steps of decoding said input video signal to derive a digital representation of any original data superimposed thereon, eliminating said original data from said output video signal, combining said original data with new data to derive composite data, and using said composite data in executing steps (d), (e) and (g).

8. A method of superimposing data on the visible portion of an output video signal in accordance with claim 7 wherein in step (g) said chip amplitude table is used to include opposite polarity chips in paired lines in said output video signal.

9. A method of superimposing data on the visible portion of an output video signal in accordance with claim 1 wherein the decoding in step (e) consists of deriving the difference of the integrals of the output video signal operated upon over the course of each of a pair of opposite polarity chips, and statistically correlating each of said chip patterns with the integral differences to determine the highest correlation.

10. A method of superimposing data on the visible portion of a video signal comprising the steps of:

(a) converting an input video signal to a digital representation thereof;

(b) for each of a multiplicity of data symbols, assigning a respective chip pattern having more chips than the number of bits represented by said each data symbol, each chip pattern having a plurality of lines, each with a plurality of chips, to be superimposed on said video signal in paired lines having respective normal and inverse forms;

(c) developing a chip amplitude table having digital values that represent the values of respective chips to be superimposed on said video signal at corresponding positions thereof; and

(d) generating an output video signal from the digital representation of said input video signal and the chip values represented in said chip amplitude table at the corresponding positions thereof.

11. A method of superimposing data on the visible portion of an output video signal in accordance with claim 10 further comprising the step of:

(e) decoding said input video signal to derive a digital representation of any data superimposed thereon; and

wherein step (d) includes the additional utilization of the digital representation derived in step (e).

12. A method of superimposing data on the visible portion of an output video signal in accordance with claim 11 wherein in step (d) said chip amplitude table is used to include opposite polarity chips in paired lines in said output video signal.

13. A method of superimposing data on the visible portion of an output video signal in accordance with claim 12 further including the steps of decoding said input video signal to derive a digital representation of any original data superimposed thereon, eliminating said original data from said output video signal, combining said original data with new data to derive composite data, and using said composite data in executing step (d).

14. A method of superimposing data on the visible portion of an output video signal in accordance with claim 10 wherein in step (d) said chip amplitude table is used to include opposite polarity chips in paired lines in said output video signal.

15. A method of superimposing data on the visible portion of a video signal comprising the steps of:

(a) assigning data symbols to said data, each data corresponding to more than one data bit;

(b) for each of a multiplicity of data symbols, assigning a respective chip pattern having more chips than the number of bits represented by said each data symbol, each chip pattern having a plurality of lines, each with a plurality of chips, to be superimposed on said video signal in paired lines having respective normal and inverse forms;

(c) developing a composite digital representation of said video signal and the chip pattern corresponding to the data symbols to be superimposed on said video signal; and

generating a video signal from said composite digital representation.

16. A method of superimposing data on the visible portion of a video signal in accordance with claim 15 further including the steps of:

(d) decoding said video signal prior to the execution of step (b) to determine any data originally superimposed thereon; and

(e) utilizing the data decoded in step (d) to partially determine the data symbols to be superimposed on said video signal.

17. A method of superimposing data on the visible portion of a video signal in accordance with claim 16 wherein in step (b) the chip patterns representing any original data determined in step (d) are eliminated from said digital representation.

18. A method of decoding data represented in the visible portion of a video signal, said video signal including for each of a multiplicity of data symbols a corresponding chip pattern having more chips than the number of bits represented by the respective data symbol, each chip pattern having a plurality of lines each with a plurality of chips superimposed on said video signal arranged in paired lines having respective normal and inverse forms;

comprising the steps of;

(a) deriving an integrated chip value for each position in each pair of lines in the lines representing a chip pattern corresponding to a single data symbol;

(b) correlating the integrated chip values derived for a single data symbol with all chip patterns corresponding to respective ones of said multiplicity of data symbols; and

(c) identifying the data symbol represented in the visible portion of said video signal in accordance with that chip pattern having the highest correlation with said data symbol.

19. A method of decoding data represented in the visible portion of a video signal in accordance with claim 18 wherein step (b) includes the sub-steps of:

(b1) for each of said chip patterns, increasing the value stored in a respective correlation accumulator by an integrated chip value if the corresponding chip in the pattern has a first polarity, and

(b2) for each of said chip patterns, decreasing the value stored in a respective correlation accumulator by an integrated chip value if the corresponding chip in the pattern has a second polarity.

20. A method of decoding data represented in the visible portion of a video signal in accordance with claim 19 wherein any integrated chip value which exceeds a first threshold level is not used directly in the correlating of step (b), but is instead used as part of a difference function together with the previous integrated chip value if the difference function does not exceed a second threshold level and the chip pattern being correlated has opposite polarity chips in positions corresponding to said any integrated chip value and the previous integrated chip value.

21. A method of decoding data represented in the visible portion of a video signal in accordance with claim 19 wherein any integrated chip value which does not exceed a first threshold level increases by an extra amount the correlation for the chip pattern being correlated if it and the previous integrated chip value have polarities that both match the polarities of the two chips in the chip pattern being correlated.

22. A method of decoding data represented in the visible portion of a video signal in accordance with claim 21 wherein any integrated chip value which increases by an extra amount the correlation for the chip pattern being correlated increases it by an even greater amount if for the chip pattern being correlated said integrated chip value and the previous integrated chip value have different polarities.

23. A method of decoding data represented in the visible portion of a video signal in accordance with claim 18 wherein any integrated chip value which exceeds a first threshold level is not used directly in the correlating of step (b), but is instead used as part of a difference function together with the previous integrated chip value if the difference function does not exceed a second threshold level and the chip pattern being correlated has opposite polarity chips in positions corresponding to said any integrated chip value and the previous integrated chip value.

24. A method of decoding data represented in the visible portion of a video signal in accordance with claim 18 wherein any integrated chip value which does not exceed a first threshold level increases by an extra amount the correlation for the chip pattern being correlated if it and the previous integrated chip value have polarities that both match the polarities of the two chips in the chip pattern being correlated.

25. A method of decoding data represented in the visible portion of a video signal in accordance with claim 24 wherein any integrated chip value which increases by an extra amount the correlation for the chip pattern being correlated increases it by an even greater amount if for the chip pattern being correlated said integrated chip value and the previous integrated chip value have different polarities.

26. A method of decoding data represented in the visible portion of a video signal, said video signal including for each of a multiplicity of data symbols a corresponding chip pattern having a plurality of lines each with a plurality of chips superimposed on said video signal arranged in paired lines having respective normal and inverse forms;

comprising the steps of;

(a) deriving a value based on the chips at each position in each pair of lines in the lines representing a chip pattern corresponding to a single data symbol;

(b) correlating the values derived for a single data symbol in step (a) with all chip patterns corresponding to respective ones of said multiplicity of data symbols; and

(c) identifying the data symbol represented in the visible portion of said video signal in accordance with that chip pattern having the highest correlation with said data symbol.

27. A method of decoding data represented in the visible portion of a video signal in accordance with claim 26 wherein step (b) includes the sub-steps of:

(b1) for each of said chip patterns, increasing the value stored in a respective correlation accumulator by an integrated chip value if the corresponding chip in the pattern has a first polarity, and

(b2) for each of said chip patterns, decreasing the value stored in a respective correlation accumulator by an integrated chip value if the corresponding chip in the pattern has a second polarity.

28. A method of decoding data represented in the visible portion of a video signal in accordance with claim 26 wherein any value which exceeds a first threshold level is not used directly in the correlating of step (b), but is instead used as part of a difference function together with the previous value if the difference function does not exceed a second threshold level and the chip pattern being correlated has opposite polarity chips in positions corresponding to said any value and the previous value.

29. A method of decoding data represented in the visible portion of a video signal in accordance with claim 28 wherein any value which does not exceed said first threshold level increases by an extra amount the correlation for the chip pattern being correlated if it and the previous value have polarities that both match the polarities of the two chips in the chip pattern being correlated.

30. A method of decoding data represented in the visible portion of a video signal in accordance with claim 29 wherein any value which increases by an extra amount the correlation for the chip pattern being correlated increases it by an even greater amount if for the chip pattern being correlated said value and the previous value have different polarities.

31. A method of encoding data in the visible portion of a transmitted video signal without degrading display of the received video signal and for decoding said data in the received video signal, comprising the steps of:

(a) selecting for each group of data bits to be transmitted an associated one of a number of longer predetermined sequences of chips,

(b) dividing the selected sequences of chips into a multiplicity of lines of chips,

(c) embedding each line of chips and its inverse, in pairwise fashion, in respective pairs of line scans of said video signal prior to its transmission,

(d) operating on received pairs of line scans to detect the lines of chips represented thereby,

(e) correlating each of said number of chip sequences with lines of chips to derive match indicators therefor, and

(f) selecting the chip sequences with the largest match indicators as the chip sequences that were transmitted.

32. A method in accordance with claim 31 wherein in step (c) the two possible values of a chip cause changes in a characteristic of the video signal in respective opposite directions.

33. A method in accordance with claim 32 wherein in step (d) one line scan in each pair of line scans operated upon is subtracted from the other line scan in the same pair in order to reduce the effect of the video signal on, and to increase the amplitude of, the detected line of chips.

34. A method in accordance with claim 32 wherein each line scan is operated upon in step (d) by deriving an integration function for each chip, and each chip function for one line scan is subtracted from a chip function for a correspondingly positioned chip in the paired line scan.

35. A method in accordance with claim 34 further including the steps of embedding a synchronizing chip pattern in a number of line scans of said video signal prior to its transmission, and operating on the received video signal to determine the position of the synchronizing chip pattern in order to ascertain chip positions for the detecting of step (d).

36. A method in accordance with claim 31 wherein in step (d) one line scan in each pair of line scans operated upon is subtracted from the other line scan in the same pair in order to reduce the effect of the video signal on, and to increase the amplitude of, the detected line of chips.

37. A method in accordance with claim 31 wherein each line scan is operated upon in step (d) by deriving an integration function for each chip, and each chip function for one line scan is subtracted from a chip function for a correspondingly positioned chip in the paired line scan.

38. A method in accordance with claim 31 further including the steps of embedding a synchronizing chip pattern in a number of line scans of said video signal prior to its transmission, and operating on the received video signal to determine the position of the synchronizing chip pattern in order to ascertain chip positions for the detecting of step (d).

39. A method of superimposing data on the visible portion of a video signal comprising the steps of:

a) assigning data symbols to said data, each data symbol corresponding to more than one data bit;

(b) for each of a multiplicity of data symbols, assigning a respective chip pattern having more chips than the number of bits represented by said each data symbol, each chip pattern having a plurality of lines, each with a plurality of chips, to be superimposed on said video signal in paired lines having respective normal and inverse forms;

(c) developing a digital representation of said chip pattern corresponding to the data symbols to be superimposed on said video signal; and

(d) adding to said video signal chips corresponding to said digital representation.

40. A method of superimposing data on the visible portion of a video signal in accordance with claim 39 further including the steps of:

(d) decoding said video signal prior to the execution of step (b) to determine any data originally superimposed thereon; and

(e) utilizing the data decoded in step (d) to partially determine the data symbols to be superimposed on said video signal.

41. A method of superimposing data on the visible portion of a video signal in accordance with claim 40 wherein in step (b) the chip patterns representing any original data determined in step (d) are eliminated from said digital representation.

42. A method of superimposing data on the visible portion of a video signal in accordance with claim 39 further including the step of embedding a synchronizing chip pattern in a number of line scans of said video signal prior to its transmission.

43. A method of decoding data represented in the visible portion of a video signal, said video signal including for each of a multiplicity of data symbols a corresponding chip pattern having more chips than the number of bits represented by the respective data symbol, each chip pattern having a plurality of lines each with a plurality of chips superimposed on said video signal arranged in paired lines having respective normal and inverse forms, said video signal also including a predetermined number of lines having thereon a synchronizing chip pattern arranged in paired lines having respective normal and inverse forms, said predetermined number of lines being slightly variable in line position within a field;

comprising the steps of;

(a) deriving a chip value for each position in each pair of lines representing a chip pattern in lines that could possibly be included in said synchronizing chip pattern;

(b) correlating each group of lines in a field that could possibly contain a synchronizing chip pattern with said synchronizing chip pattern, and identifying the group of lines having the highest correlation as the group of lines containing said synchronizing chip pattern;

(c) determining from the position in the field of the synchronizing chip pattern which other lines represent chip patterns corresponding to data symbols;

(d) deriving a chip value for each position in each pair of said other lines;

(e) correlating the chip values derived for a single data symbol with all chip patterns corresponding to respective ones of said multiplicity of data symbols; and

(f) identifying each data symbol in accordance with the chip pattern having the highest correlation with said data symbol.

44. A method of decoding data represented in the visible portion of a video signal, said video signal including for each of a multiplicity of data symbols a corresponding chip pattern, said video signal also including a predetermined number of lines having thereon a synchronizing chip pattern arranged in paired lines having respective normal and inverse forms, said predetermined number of lines being slightly variable in line position within a field;

comprising the steps of;

(a) deriving a chip value for each position in each pair of lines representing a chip pattern in lines that could possibly be included in said synchronizing chip pattern;

(b) correlating each group of lines in a field that could possibly contain a synchronizing chip pattern with said synchronizing chip pattern, and identifying the group of lines having the highest correlation as the group of lines containing said synchronizing chip pattern;

(c) determining from the position in the field of the synchronizing chip pattern which other lines represent chip patterns corresponding to data symbols; and

(d) operating on the chip pattern corresponding to each data symbol to determine which of said multiplicity of data symbols it represents.