Dual state memory card having combined and single circuit operation

• US 6,097,883 A
• Filed: 07/08/1997
• Issued: 08/01/2000
• Est. Priority Date: 07/08/1997
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Dell, Timothy Jay, Kellogg, Mark William, Hazelzet, Bruce Gerard
• Primary Examiner(s): Sheikh, Ayaz R.
• Assistant Examiner(s): JEAN, FRANTZ B
• Application Number:
  US08/889,263
• Time in Patent Office: 1,120 Days
• Field of Search: 361/728, 361/679, 361/684, 361/736, 361/737, 361/760, 361/785, 439/59, 439/61, 439/637, 439/636, 439/626, 439/629, 395/281, 395/282
• US Class Current: 710/301
• CPC Class Codes: G11C 5/04 Supports for storage elements , e.g. memory modules; Mounting or fixing of storage elements on such supports
• CPC Class Codes: G11C 5/06 Arrangements for interconnecting storage elements electrically, e.g. by wiring
• CPC Class Codes: G11C 8/12 Group selection circuits, e.g. for memory block selection, chip selection, array selection
• CPC Class Codes: H05K 1/117 Pads along the edge of rigid circuit boards, e.g. for pluggable connectors

Abstract

A printed circuit card having first and second circuit units mounted thereon in connection to terminal pads adjacent two card edges, with the first and second circuit units being in connection to each other and to select pads of a first edge such that upon insertion of that edge into a given card socket, both circuit units are enabled, and the circuit units also being in connection to the pads of a second edge such that upon insertion of that edge into a second card socket, only the second circuit unit is enabled. In the preferred embodiment, the card is a memory module card having buffer and memory circuit units designed to cooperate with each other and with either of standard, buffered or unbuffered memory card sockets in a system board in accordance with insertion of a first or second pad edge in one of the card sockets to automatically provide, either combined circuit unit operation, or single circuit operation. The invention is also applicable to clocked register circuits and series pass devices.

Claims

1. A circuit card for use with system boards having a card socket for receiving the edge of a circuit card and containing a plurality of electrically powered contacts for contacting pads adjacent the received card edge and for enabling circuit units of the card, the circuit card comprising:

a substantially planar card body comprised of insulative material;

a plurality of pads mounted along a first and a second edge of said card; and

a first and a second circuit unit mounted on said card body and connected to pads mounted along said first and second edges, said first and second circuit units being connected to pads mounted on said first edge such that upon insertion of said first edge into a first card socket, said first and second circuit units are enabled in combination, and at least said second circuit unit also being connected to the pads mounted on said second edge such that upon insertion of said second edge into a second card socket, said second circuit unit alone is enabled.

8. The circuit card of claim 1 wherein:

the first and second sockets include tactile discontinuities; and

said first and second edges of said circuit card carry tactile discontinuities complementary to those of the first and second card sockets to allow only an appropriate card edge to be inserted in to a given socket.

9. The circuit card of claim 8, wherein:

the first and second sockets include differently positioned protuberances within each socket, respectively; and

said first and second edges of said circuit card carry indents positioned on a given card edge in accordance with the position of the protuberance within the socket appropriate for that edge.

2. A circuit card for use with system boards having a card socket for receiving the edge of a circuit card and containing a plurality of electrically powered contacts for contacting pads adjacent the received card edge and for enabling circuit units of the card, the circuit card comprising:

a substantially planar card body comprised of insulative material;

a plurality of pads mounted along a first and a second edge of said card; and

a first and a second circuit unit mounted on said card body and connected to pads mounted along said first and second edges, said first and second circuit units being connected to pads mounted on said first edge such that upon insertion of said first edge into a first card socket, said first and second circuit units are enabled, and at least said second circuit unit also being connected to the pads mounted on said second edge such that upon insertion of said second edge into a second card socket, said second circuit unit is enabled; and

said first and second circuit units are connected to the pads mounted on said second edge such that upon insertion of said second edge into the second card socket, said second circuit unit is enabled, and said first circuit unit is disabled.

3. The circuit card of claim 2 wherein:

said first and second circuit units are connected together such that said first and second units are enabled in combination from the system board when said first edge is inserted in the first card socket; and

said second circuit unit alone is enabled when said second edge is inserted in the second card socket.

4. The circuit card of claim 2 wherein:

said first and second circuit units are connected together such that said first and second units are enabled in combination from the system board when said first edge is inserted in the first card socket; and

said second circuit unit is enabled and said first circuit unit disabled when said second edge is inserted in the second card socket.

5. The circuit card of claim 2 wherein:

said first circuit unit is a tristate unit having a tristate lead, and said first circuit unit is enabled when an enabling voltage is applied to said tristate lead and is disabled when a disabling voltage is applied thereto;

said first circuit unit is connected to said first edge to provide said enabling voltage to said tristate lead when said first edge is inserted in the first card socket; and

said first circuit unit is connected to said second edge to provide said disabling voltage to said tristate lead when said second edge is inserted in the second card socket.

6. The circuit card of claim 5 wherein:

said enabling voltage is the system ground; and

said disabling voltage is a select voltage other than ground.

7. The circuit card of claim 5 wherein:

said tristate lead is connected to a ground pad of said first edge and a power voltage pad of said second edge such that said first circuit unit is enabled when said first edge is inserted in the first card socket and is disabled when said second edge is inserted in the second card socket.

10. The circuit card of claim 2 wherein,

said first circuit unit is a buffer circuit:

and

said buffer circuit is connected to said second circuit unit in a configuration such that, when said first edge is inserted in the first card socket, said buffer circuit is directly enabled from the circuit board to buffer signals therefrom and deliver them in a buffered condition to said second circuit.

11. The circuit card of claim 10 wherein;

said first circuit unit is a buffer circuit; and

said second circuit unit is a memory circuit and said buffer circuit is connected to said memory circuit in a configuration such that, when said first edge is inserted in the first card socket, said buffer circuit and said memory circuit are enabled in combination, and when said second card edge is inserted in the second card socket, only said memory circuit is enabled.

12. The circuit card of claim 11 wherein:

said buffer circuit is a tristate unit having a tristate lead;

said buffer circuit being configured to be enabled or disabled respectively in accordance with first and second voltage levels applied to said tristate lead;

said tristate lead being connected in parallel to one voltage pad of said first edge and to one voltage pad of said second edge;

said one voltage pad of said first edge being arranged for connection to a first voltage level to enable said buffer circuit when said first edge is inserted in the first card socket of said circuit board; and

said one voltage pad of said second edge being arranged for connection to said second voltage level to disable said buffer when said second edge is inserted in the second card socket.

13. The circuit card of claim 12 wherein:

said disabling and enabling voltage levels are ground and Vdd, respectively;

said one voltage pad of said first edge is arranged for connection to ground so as to enable said buffer circuit when said second card edge is inserted in the first card socket; and

said one voltage pad of said second edge is arranged for connection to Vdd so as to disable said buffer circuit when said second card edge is inserted in the second card socket.

14. The circuit card of claim 12 wherein:

said second circuit unit is a memory circuit;

said buffer circuit is connected to said memory circuit on said card such that said memory unit is enabled, at least in part, through said buffer circuit when said first edge is inserted in the first card socket; and

said memory circuit unit is enabled directly from the circuit board when said second card edge is inserted in the second card socket.

15. The circuit card of claim 2 wherein:

said first circuit unit is a clocked register circuit; and

said clocked register circuit is connected to said second circuit unit in a configuration such that, when said first edge is inserted in the first card socket, said clocked register circuit is directly enabled from the circuit board to transmit signals therefrom and deliver them to said second circuit.

16. The circuit card of claim 2 wherein:

said first circuit unit is a series pass circuit; and

said series pass circuit is connected to said second circuit unit in a configuration such that, when said first edge is inserted in the first card socket, said series pass circuit is directly enabled from the circuit board to transmit signals therefrom and deliver them to said second circuit.

17. A circuit system board comprising:

a printed circuit board;

a card socket for receiving an edge of a circuit card and containing a plurality of electrically powered contacts for contacting the pads on the received edge of the circuit card and for enabling circuit units thereon; and

a circuit card comprising;

a substantially planar card body comprised of insulative material;

a plurality of pads mounted along a first and a second edge of said card; and

a first and a second circuit unit mounted on said card body and connected to pads mounted along said first and second edges, said first and second circuit units being connected to pads mounted on said first edge such that upon insertion of said first edge into a first card socket, said first and second circuit units are enabled in combination, and at least said second circuit unit also being connected to the pads mounted on said second edge such that upon insertion of said second edge into a second card socket, said second circuit unit alone is enabled.

18. A circuit system board comprising:

a printed circuit board;

a card socket for receiving an edge of a circuit card and containing a plurality of electrically powered contacts for contacting the pads on the received edge of the circuit card and for enabling circuit units thereon; and

a circuit card comprising;

a substantially planar card body comprised of insulative material;

a plurality of pads mounted along a first and a second edge of said card; and

a first and a second circuit unit mounted on said card body and connected to pads mounted along said first and second edges, said first and second circuit units being connected to pads mounted on said first edge such that upon insertion of said first edge into a first card socket, said first and second circuit units are enabled, and at least said second circuit unit also being connected to the pads mounted on said second edge such that upon insertion of said second edge into a second card socket, said second circuit unit is enabled; and

said first and second circuit units are connected to pads mounted on said second edge such that upon insertion of said second edge into the second card socket, said second circuit unit is enabled, and said first circuit unit is disabled.

19. The circuit card of claim 18 wherein:

said first circuit unit is a buffer circuit; and

said second circuit unit is a memory circuit;

said buffer circuit is connected to said second circuit unit in a configuration such that, when said first edge is inserted in the first card socket, said buffer circuit and said memory circuit are enabled in combination, and when said second card edge is inserted in the second card socket, only said memory circuit is enabled.

20. The circuit card of claim 19 wherein:

said buffer circuit is a tristate unit having a tristate lead;

said buffer circuit being configured to be enabled or disabled respectively in accordance with first and second voltage levels applied to said tristate lead;

said tristate lead being connected in parallel to one voltage pad of said first edge and to one voltage pad of said second edge;

said one voltage pad of said first edge being arranged for connection to a first voltage level to enable said buffer circuit when said first edge is inserted in the first card socket of said circuit board; and

said one voltage pad of said second edge being arranged for connection to said second voltage level to disable said buffer when said second edge is inserted in the second card socket.

21. In a computer having a system board having a card socket for receiving the edge of a circuit card and containing a plurality of electrically powered contacts for contacting pads adjacent the received card edge and for enabling circuit units of the card;

a circuit card mounted on said system board comprising;

a substantially planar card body comprised of insulative material;

a plurality of pads mounted along a first and a second edge of said card; and

a first and a second circuit unit mounted on said card body and connected to pads mounted along said first and second edges, said first and second circuit units being connected to pads mounted on said first edge such that upon insertion of said first edge into a first card socket, said first and second circuit units are enabled in combination, and at least said second circuit unit also being connected to the pads mounted on said second edge such that upon insertion of said second edge into a second card socket, said second circuit unit alone is enabled.

22. In a computer having a system board having a card socket for receiving the edge of a circuit card and containing a plurality of electrically powered contacts for contacting pads adjacent the received card edge and for enabling circuit units of the card;

a circuit card mounted on said system board comprising;

a substantially planar card body comprised on insulative material;

a plurality of pads mounted along a first and a second edge of said card; and

a first and a second circuit unit mounted on said card body and connected to pads mounted along said first and second edges, said first and second circuit units being connected to pads mounted on said first edge such that upon insertion of said first edge into a first card socket, said first and second circuit units are enabled, and at least said second circuit unit also being connected to the pads mounted on said second edge such that upon insertion of said second edge into a second card socket, said second circuit unit alone is enabled, and

said first circuit unit is a buffer circuit; and

said buffer circuit is connected to said second circuit unit in a configuration such that, when said first edge is inserted in the first card socket, said buffer circuit is directly enabled from the circuit board to buffer signals therefrom and deliver them in a buffered condition to said second circuit.

23. The computer of claim 22 wherein:

said first circuit unit is a clocked register circuit; and

said clocked register circuit is connected to said second circuit unit in a configuration such that, when said first edge is inserted in the first card socket, said clocked register circuit is directly enabled from the circuit board to transmit signals therefrom and deliver them to said second circuit.

24. The computer of claim 22 wherein:

said first circuit unit is a series pass circuit; and

said series pass circuit is connected to said second circuit unit in a configuration such that, when said first edge is inserted in the first card socket, said series pass circuit is directly enabled from the circuit board to transmit signals therefrom and deliver them to said second circuit.