Installation and removal of components of a computer

• US 6,098,132 A
• Filed: 09/30/1997
• Issued: 08/01/2000
• Est. Priority Date: 06/05/1996
• Status: Expired due to Term

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Compaq Computer Corporation (HP Inc.)
• Inventors: Santeler, Paul A., Olarig, Sompong P., Jansen, Kenneth A.
• Primary Examiner(s): AUVE, GLENN ALLEN
• Application Number:
  US08/940,419
• Time in Patent Office: 1,036 Days
• Field of Search: 395/281, 395/282, 395/283, 395/309, 710/101, 710/102, 710/103, 710/129
• US Class Current: 710/302
• CPC Class Codes: G06F 13/4081 Live connection to bus, e.g. hot-plugging current or voltage limitation during live insertion H02H9/004

Abstract

A computer system includes a memory bus, a connector and a controller. The connector is configured to receive a memory module and prevent removal of the memory module from the connector in a first state. The connector allows removal of the memory module from the connector in a second state. The controller is configured to change a connection status between the connector and the memory bus in response to the connector changing from one of the states to the other state. A central processing unit of the computer system is configured to use the memory bus to store data in the memory module.

Claims

1. A computer system comprising:

a memory bus;

a connector configured to receive a memory module, the connector preventing removal of the memory module from the connector in a first state and allowing removal of the memory module from the connector in a second state;

a controller configured to disconnect the memory bus from the connector in response to the connector changing from the first state to the second state; and

a central processing unit operable to use the memory bus to store data in the memory module.

2. The computer system of claim 1, further comprising:

a power line, wherein

the controller is further configured to disconnect the power line from the connector in response to the connector changing from the first state to the second state.

3. The computer system of claim 2, wherein the controller is further configured to disconnect the memory bus before disconnecting the power line.

4. The computer system of claim 1, further comprising:

a clock line, wherein

the controller is further configured to disconnect the clock line from the connector in response to the connector changing from the first state to the second state.

5. The computer system of claim 4, wherein the controller is further configured to disconnect the memory bus before disconnecting the clock line.

6. The computer system of claim 1, further comprising:

a clock line; and

a power line, wherein

the controller is further configured to disconnect the power and clock lines from the connector in response to the connector changing from the first state to the second state.

7. The computer system of claim 6, wherein the controller is further configured to:

disconnect the memory bus before disconnecting the clock and power lines, and

disconnect the clock line before disconnecting the power line.

8. The computer system of claim 1, further comprising:

a latch operable to selectively secure the memory module to the connector,

wherein the controller is further operable to use the latch to secure the memory module to the connector during at least a duration when the controller is changing the connection status between the connector and the memory bus.

9. The computer system of claim 8, wherein the latch comprises a solenoid.

10. A computer system comprising:

a clock line;

a memory bus;

a connector adapted to receive a memory module, the connector preventing removal of the memory module from the connector in a first state and allowing removal of the memory module from the connector in a second state;

a controller operable to connect the clock line to the connector before connecting the memory bus to the connector in response to the connector changing from the second state to the first state; and

a central processing unit operable to use the memory bus to store data in the memory module.

11. The computer system of claim 10, further comprising:

a power line, wherein

the controller is further configured to connect the power line to the connector in response to the connector changing from the second state to the first state.

12. The computer system of claim 11, wherein the controller is further configured to connect the power line before connecting the memory bus.

13. The computer system of claim 10, wherein the controller is further configured to initialize the memory module.

14. The computer system of claim 13, wherein the controller is configured to initialize the memory module by issuing a precharge command.

15. The computer system of claim 13, wherein the controller is configured to initialize the memory module by issuing a mode register set command.

16. The computer system of claim 13, wherein the controller is configured to initialize the memory module by issuing an auto refresh command.

17. The computer system of claim 13, wherein the controller is configured to initialize the memory module by providing no inputs to the memory module for a predetermined duration.

18. The computer system of claim 10, further comprising:

a latch configured to selectively secure the memory module to the connector, wherein

the controller is further configured to use the latch to secure the memory module to the connector during at least a duration when the controller is changing the connection status between the connector and the memory bus.

19. The computer system of claim 18, wherein the latch comprises a solenoid.

20. A method for use with a computer system having a memory bus and a connector capable of receiving a memory module, comprising:

monitoring the connector, the connector preventing removal of the memory module from the connector in a first state and allowing removal of the memory module from the connector in a second state;

disconnecting the memory bus from the connector in response to the connector changing from the first state to the second state; and

disconnecting a clock line from the connector after disconnecting the memory bus in response to the connector changing from the first state to the second state.

21. The method of claim 20, further comprising:

disconnecting a power line from the connector in response to the connector changing from the first state to the second state.

22. The method of claim 21, wherein the disconnecting the power line includes disconnecting the memory bus before disconnecting the power line.

23. A method for use with a computer system having a memory bus and a connector capable of receiving a memory module, comprising:

monitoring the connector, the connector preventing removal of the memory module from the connector in a first state and allowing removal of the memory module from the connector in a second state;

connecting a clock line to the connector in response to the connector changing from the second state to the first state; and

connecting the memory bus to the connector after connecting the clock line in response to the connector changing from the second state to the first state.

24. The method of claim 23, further comprising:

connecting a power line from the connector in response to the connector changing from the second state to the first state.

25. The method of claim 24, wherein the connecting the power line includes connecting the power line before connecting the memory bus.

26. The method of claim 23, further comprising initializing the memory module.

27. The method of claim 26, wherein the initializing includes issuing a precharge command.

28. The method of claim 26, wherein the initializing includes issuing a mode register set command.

29. The method of claim 26, wherein the initializing includes issuing an auto refresh command.

30. The method of claim 26, wherein the initializing includes providing no inputs to the memory module for a predetermined duration.

31. A computer system comprising:

a communication link;

a processor connected to the communication link;

a connector for receiving a component; and

a circuit configured to detect the presence of the component in the connector and selectively connect the communication link to the connector based on the detected presence of the component,

wherein the circuit is operable to connect the communication link to the connector after connecting a clock signal to the connector and disconnect the communication link from the connector before removing a clock signal from the connector.

32. The computer system of claim 31, wherein

the connector has a clamp configured to selectively prevent removal of the component from the connector when the clamp is engaged;

and

the circuit is further configured to selectively connect the link to the connector based on the engagement state of the clamp.

33. The computer system of claim 32 wherein the circuit is further configured to connect the link to the connector when the clamp is engaged and disconnect the connector from the link when the clamp is disengaged.

34. The computer system of claim 32, wherein

the processor is configured to authorize the circuit to connect the link to the connector, and

the circuit is further configured to connect the link to the connector only after the processor authorizes the circuit to connect the link to the connector.

35. The computer system of claim 32, wherein the circuit is further configured to connect the link to the connector when the component is in the connector and disconnect the link from the connector when the component is out of the connector.

36. The computer system of claim 35, wherein

the processor is configured to authorize the circuit to connect the link to the connector, and

the circuit is further configured to connect only after the processor authorizes the circuit to connect the link to the connector.

37. The computer system of claim 31, further comprising:

at least one power line,

wherein the circuit is operable to disconnect the communication link from the connector before disconnecting the connector from one of the power lines.

38. The computer system of claim 31 wherein the communication link comprises communication lines of a local bus.

39. The computer system of claim 31 wherein the component comprises a processor.

40. The computer system of claim 31 wherein the component comprises a circuit card.

41. The computer system of claim 31 wherein the component comprises a central processing unit.

42. The computer system of claim 31 wherein the component comprises a memory module.

43. A computer system comprising:

a local bus;

a clock line;

memory connected to the local bus;

a processor connected to the local bus;

a connector for receiving a component; and

a circuit having a clamp configured to selectively prevent removal of the component from the connector when the clamp is engaged, the circuit configured to;

detect the presence of the component in the connector,

detect when the clamp is engaged, and

selectively connect the local bus to the connector after connecting the clock line to the connector based on the detection of the presence of the component and the engagement state of the connector.

44. A method for use in a computer system having a communication link, a processor connected to the communication link, and a connector for receiving a component of the computer system, the method comprising:

detecting whether the component is in the connector;

providing power and a clock signal to the connector; and

subsequently connecting communication lines of the link to the connector based on the detecting.

45. The method of claim 44, wherein the connector has a clamp configured to selectively prevent removal of the component from the connector when the clamp is engaged, wherein the connecting the communication link includes:

selectively connecting the link to the connector based on the engagement state of the clamp.

46. The method of claim 45 wherein the connecting the communication link further includes:

connecting the link to the connector when the clamp is engaged; and

disconnecting the connector from the link when the clamp is disengaged.

47. The method of claim 44, wherein the processor is configured to authorize a circuit to connect the link to the connector, wherein the connecting the communication link further includes:

connecting the link to the connector only after the processor authorizes the circuit to connect the link to the connector.

48. The method of claim 44 wherein the connecting includes:

connecting the link to the connector when the component is in the connector; and

disconnecting the link from the connector when the component is out of the connector.

49. The method of claim 48, wherein the processor is configured to authorize a circuit to connect the link to the connector, the method further comprising:

authorizing using the processor to authorize the connection before the connecting.

50. The method of claim 48, wherein the disconnecting includes:

removing power and a clock signal from the connector; and

disconnecting communication lines of the link before the removing.

51. The method of claim 44 wherein the communication link comprises a local bus.

52. The method of claim 44 wherein the component comprises a processor.

53. The method of claim 44 wherein the component comprises a daughter card.

54. The method of claim 44 wherein the component comprises a central processing unit.

55. The method of claim 44 wherein the component comprises a memory module.

56. A method for powering up a removable component when the component is inserted into a connector of a computer system, the method comprising:

providing power and a clock signal to the component; and

electrically coupling a communication link to the component after both the power and the clock signal are provided to the component.

57. The method of claim 56, further comprising delaying to allow power on the component to stabilize before the electrically coupling.

58. The method of claim 56, further comprising delaying to allow circuitry on the component to become synchronized with the clock signal before electrically coupling.

59. The method of claim 56, further comprising arbitrating for control of the communication link before coupling the communication link.

60. The method of claim 56, wherein the communication link comprises data and address lines of a bus.

61. The method of claim 56 further comprising arbitrating for control of the communication link before providing the clock signal.

62. The method of claim 56 wherein the communication link comprises data and address lines of a local bus.

63. The method of claim 56 wherein the power is provided to the component before the clock signal is provided.

64. The method of claim 56 further comprising furnishing a delay to allow power on the component to stabilize before providing the clock signal.

65. The method of claim 56 further comprising:

resetting the component after the power is provided.

66. The method of claim 56 further comprising:

arbitrating for control of the communication link before the resetting.

67. A method for powering up a removable component when the component is inserted into a connector of a computer system, the computer system having a communication link with lines for transmitting signals synchronized to a clock signal and lines for arbitrating for control of the local bus, the method comprising:

(a) providing power to the component;

(b) arbitrating for control of the communication link after providing power;

(c) providing the clock signal to the component after arbitrating for control after providing power;

(e) arbitrating for control of the communication link after providing the clock signal;

(f) bringing the component out of reset after arbitrating for control of the communication link;

(g) arbitrating for control of the communication link after bringing the component out of reset; and

(f) electrically coupling the lines of the communication link to corresponding lines of the component after arbitrating for control of the communication link.

68. A method for powering down a removable component when it is removed from a connector of a computer system, the method comprising:

electrically isolating a communication link from the component; and

removing power and a clock signal from the component after the isolating.

69. The method of claim 68, the method further comprising arbitrating for control of the communication link before isolating the communication link.

70. The method of claim 69, the method further comprising arbitrating for control of the communication link before removing the clock signal.

71. The method of claim 68, wherein the communication link comprises address and data lines of a bus.

72. The method of claim 68, wherein the clock signal is removed from the component before the power.

73. The method of claim 68, further comprising:

resetting the component before the communication link is isolated.

74. The method of claim 73, wherein the resetting occurs before either power is removed or the clock signal is removed.

75. The method of claim 73, wherein the communication link has lines for arbitration, the method further comprising arbitrating for control of the communication link before the component is reset.

76. The method of claim 75, wherein the communication link comprises address and data lines of a local bus.

77. A method for powering down a removable component inserted into a connector of a computer system, the connector electrically coupled to a local bus having lines for transmitting signals synchronized to a clock signal and lines for arbitrating for control of the local bus, the method comprising:

(a) arbitrating for control of the local bus;

(b) placing the component in reset;

(c) arbitrating for control of the local bus after placing the component in reset;

(d) electrically isolating the lines of the local bus from corresponding lines of the component after arbitrating for control;

(e) arbitrating for control of the local bus after electrically isolating;

(f) removing the clock signal from the component after arbitrating for control; and

(g) removing power from the component after removing the clock signal.

78. A computer system comprising:

a mass storage device;

a communication link for communicating with the mass storage device;

a power line;

a clock line;

a connector having electrical contacts corresponding to the communication link;

a component inserted into the connector; and

a control circuit for powering up the component, the control circuit configured to place the component in reset, connect the power line to the connector, connect the clock line to the connector, and connect the communication link to the connector after only both the power line and the clock line are connected to the connector.

79. The computer system of claim 78 wherein the control circuit is further configured to allow power on the component to stabilize before connecting the communication link.

80. The computer system of claim 78 wherein the control circuit is further configured to allow a circuit on the component to become synchronized with the clock signal before connecting the communication link.

81. The computer system of claim 78 wherein the control circuit further provides a reset signal to the connector for resetting the component before the communication link is connected to the connector.

82. The computer system of claim 78 wherein the control circuit is further configured to arbitrate for control of the communication link before resetting the component.

83. The computer system of claim 78 wherein the control circuit is further configured to arbitrate for control of the communication link before connecting the clock line.

84. The computer system of claim 78 wherein the control circuit is further configured to arbitrate for control of the communication link before connecting the communication link.

85. A computer system comprising:

a communication link having communication lines, a power line and a clock line;

a connector having electrical contacts corresponding to the communication link;

a component inserted into the connector; and

a control circuit for powering down the component, the control circuit configured to place the component in reset, disconnect the power line from the connector, and disconnect the communication lines of the communication link from the connector before either the power line or clock lines are disconnected from the connector.

86. The computer system of claim 85, wherein the control circuit is further configured to provide a reset signal to the connector for resetting the component before either the power line or the clock line is disconnected from the connector.

87. The computer system of claim 86, wherein the control circuit is further configured to reset the component without arbitrating for control of the communication link.

88. The computer system of claim 85, wherein the control circuit is further configured to arbitrate for control of the communication link before disconnecting the clock line.

89. The computer system of claim 85, wherein the control circuit is further configured to arbitrate for control of the communication link before disconnecting the communication lines of the communication link.

90. A computer system, comprising:

a bus, including power, clock and data lines;

a connector for receiving a component;

a processor coup led to the bus for communicating with the component;

means for detecting a component insertion and removal; and

means for selectively connecting and disconnecting the bus to the connector based on the means for detecting, where in the data lines are connected after the power and clock lines are connected, and wherein the data lines are disconnected before the power and clock lines are disconnected.