Method of forming an opening in a dielectric layer through a photoresist layer with silylated sidewall spacers

• US 6,100,014 A
• Filed: 11/24/1998
• Issued: 08/08/2000
• Est. Priority Date: 11/24/1998
• Status: Expired due to Fees

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Lin, Kun-Chi, Lin, Benjamin Szu-Min
• Primary Examiner(s): McPherson, John A.
• Application Number:
  US09/199,883
• Time in Patent Office: 623 Days
• Field of Search: 430/312, 430/313, 430/314, 430/317, 430/324, 430/325, 430/326, 438/696
• US Class Current: 430/314
• CPC Class Codes: G03F 7/40 Treatment after imagewise removal, e.g. baking
• CPC Class Codes: G03F 7/405 Treatment with inorganic or organometallic reagents after imagewise removal

Abstract

A semiconductor fabrication method is provided for forming an opening in a dielectric layer, which can help downsize the critical dimension of the resulting opening through the use of a photoresist layer with silylated sidewall spacers. By this method, the first step is to coat a base photoresist layer over the dielectric layer. Next, a photolithographic process is performed to remove a selected part of the base photoresist layer. Then, a conformational coating process is performed to coat a silylatable photoresist layer over the base photoresist layer to a controlled predefined thickness. Subsequently, a silylation process is performed on the silylatable photoresist layer so as to form a silylated photoresist layer over all the exposed surfaces of the base photoresist layer. After this, a first etching process is performed on the silylated photoresist layer, with the remaining portions of the silylated photoresist layer serving as silylated sidewall spacers on the base photoresist layer. Then, with the combined structure of the base photoresist layer and the overlying silylated sidewall spacers serving as mask, a second etching process is performed on the dielectric layer to etch away the unmasked part of the dielectric layer to form the intended opening in the dielectric layer.

Claims

1. A method for forming an opening in a dielectric layer formed over a semiconductor substrate, comprising the steps of:

coating a base photoresist layer over the dielectric layer;

performing a photolithographic process to remove a selected part of the base photoresist layer lies directly over the part of the dielectric layer where the intended opening is located;

performing a conformational coating process to coat a silylatable photoresist layer over the base photoresist layer to a controlled predefined thickness;

performing a silylation process on the silylatable photoresist layer so as to form a silylated photoresist layer over all the exposed surfaces of the base photoresist layer;

performing a first etching process on the silylated photoresist layer, with the remaining part of the silylated photoresist layer serving as silylated sidewall spacers on the base photoresist layer;

with the combined structure of the base photoresist layer and the overlying silylated sidewall spacers serving as mask, performing a second etching process on the dielectric layer to etch away the unmasked part of the dielectric layer to form the intended opening in the dielectric layer; and

removing the combined structure of the base photoresist layer and the overlying silylated sidewall spacers.

2. The method of claim 1, wherein the first etching process is a dry-etching process.

3. The method of claim 1, wherein the second etching process is a dry-etching process.

4. The method of claim 1, wherein the opening in the dielectric layer is a contact opening.

5. The method of claim 1, wherein the opening in the dielectric layer is a via opening.

6. The method of claim 1, wherein the opening in the dielectric layer is a damascene opening.

7. The method of claim 1, wherein the silylation process is performed with silicomethane serving as the silylating agent.

8. A method of defining a photoresist mask on a semiconductor wafer, comprising the steps of:

coating a base photoresist layer over the wafer;

performing a photolithographic process to remove a selected part of the base photoresist layer so as to form an opening in the base photoresist layer;

forming a silylated sidewall spacer to a controlled thickness on the sidewall of the opening in the base photoresist layer, wherein the combined structure of the base photoresist layer and the silylated sidewall spacer serve as the intended photoresist mask.

9. The method of claim 8, wherein the silylated sidewall spacer is formed by the steps of:

performing a conformational coating process to coat a silylatable photoresist layer over the base photoresist layer to a controlled predefined thickness;

performing a silylation process on the silylatable photoresist layer so as to form a silylated photoresist layer over all the exposed surfaces of the base photoresist layer; and

performing an etching process on the silylated photoresist layer, with the remaining part of the silylated photoresist layer serving as the intended silylated sidewall spacer.

10. The method of claim 9, further comprising the step of:

exposing the silylatable photoresist layer to light.

11. The method of claim 10, wherein the silylation process is performed with silicomethane serving as the silylating agent.