Microchannel-element assembly and preparation method thereof

• US 6,100,107 A
• Filed: 08/06/1998
• Issued: 08/08/2000
• Est. Priority Date: 08/06/1998
• Status: Expired due to Term

• Current Assignee: Industrial Technology Research Institute
• Original Assignee: Industrial Technology Research Institute
• Inventors: Lei, Kuo-Lung, Wuu, Dong-Sing, Wu, Ching-Yi, Chung, Chen-Kuei, Jaw, Ten-Hsing
• Primary Examiner(s): Wilczewski, Mary
• Assistant Examiner(s): Lin, Yung A.
• Application Number:
  US09/137,447
• Time in Patent Office: 733 Days
• Field of Search: 438/50, 438/52, 438/53, 438/456, 438/745, 216/2, 73/514.16, 73/717, 73/754
• US Class Current: 438/50
• CPC Class Codes: B81B 1/00 Devices without movable or flexible elements, e.g. microcapillary devices

Abstract

A preparation method for an integrated assembly of a microchannel and an element is disclosed. In the preparation method of this invention, an element is prepared between a substrate and a sacrificial layer. Two protection layers, which are resistant to etchant for said substrate and said sacrificial layer, are prepared to isolate said element from its ambient environment. Said sacrificial layer defines an area to be etched off such that a microchannel may be formed. A coating layer with etching windows is then prepared on said sacrificial layer and the assembly is etched in an etchant to etch off said sacrificial layer and an area of said substrate beneath said sacrificial layer. An integrated assembly of a closed microchannel and an element is then accomplished. In the invented method, no bonding process is necessary and the integrated assembly so prepared has a planarization surface. This invention also disclosed a microchannel-element assembly prepared under the method of this invention.

Claims

1. A method for the preparation of an assembly of a microchannel and an element, comprising the following steps in sequential order;

prepare a substrate;

form a first etching resistant layer on said substrate wherein said first etching resistant layer comprises at least one etching window;

form an element on said first etching resistant layer at an area other than said at least one etching window;

form a second etching resistant layer on said first etching resistant layer and said sensing element, thus said sensing element is insulated securely by said first and said second etching resistant layers;

wherein said second etching resistant layer comprises at least one etching window substantially with same dimension and at same position(s) as said at least one etching window in said first etching resistant layer;

form a sacrificial layer on said second etching resistant layer;

form a third etching resistant layer on said sacrificial layer wherein said third etching resistant layer comprises a number of cavities at positions corresponding to said at least one etching window of said second etching resistant layer;

etch the product so prepared in an etchant; and

form a coating layer on said third etching resistant layer.

2. The method according to claim 1 wherein said element comprises a sensing element.

3. The method according to claim 1 wherein said element comprises a heat-generating element.

4. The method according to claim 1, 2 or 3 wherein said etching resistant layer comprises a thermal conductive and etching resistant material.

5. The method according to claim 4 wherein said etching resistant layer is a silicon nitride layer.