Method and apparatus for digital voltage regulation

• US 6,100,676 A
• Filed: 10/30/1998
• Issued: 08/08/2000
• Est. Priority Date: 10/30/1998
• Status: Expired due to Term

• Current Assignee: Volterra Semiconductor Corporation (Analog Devices, Inc.)
• Original Assignee: Volterra Semiconductor Corporation (Analog Devices, Inc.)
• Inventors: Schultz, Aaron, Burstein, Andrew J.
• Primary Examiner(s): NGUYEN, MATTHEW VAN
• Application Number:
  US09/183,325
• Time in Patent Office: 648 Days
• Field of Search: 323/222, 323/282, 323/283, 363/65, 363/71, 363/72
• US Class Current: 323/283
• CPC Class Codes: H02M 3/157 with digital control
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel

Abstract

A digital voltage regulator has an input terminal coupled to an input voltage source, an output terminal coupled to a load, and a plurality of switching circuits to alternately couple and decouple the input terminal to the output terminal. An estimated current is calculated for each switching circuit, each estimated current representing a current passing through an inductor associated with the switching circuit. A total desired output current to pass through the inductors is calculated which will maintain an output voltage at the output terminal substantially constant. The switching circuits are controlled based on the estimated current and the total desired output current so that a total current passing through the inductors is approximately equal to the total desired output current.

Claims

1. A method of operating a voltage regulator having an input terminal to be coupled to an input voltage source, an output terminal to be coupled to a load, and a plurality of switching circuits to alternately couple and decouple the input terminal to the output terminal, comprising:

a) calculating an estimated current for each switching circuit, each estimated current representing a current passing through an inductor associated with the switching circuit;

b) calculating a total desired output current to pass through the inductors which will maintain an output voltage at the output terminal substantially constant; and

c) controlling the switching circuits based on the estimated current and the total desired output current so that a total current passing through the inductors is approximately equal to the total desired output current.

2. The method of claim 1, wherein steps (a) through (c) are iterated.

3. The method of claim 1, wherein steps (a) through (c) are iterated at a clock frequency f_clock which is an significantly faster than a desired switching frequency f_switch of the switching circuit.

4. The method of claim 1, wherein calculating the total desired output current includes determining the total current passing through the switching circuits and determining a capacitive current flowing to or from capacitors coupled to the output terminal.

5. The method of claim 4, wherein determining the total current passing through the switching circuits includes summing the estimated current for each inductor.

6. The method of claim 4, wherein determining the capacitive current includes measuring a change in the output voltage.

7. The method of claim 6, wherein the capacitive current is calculated from the following equation:

##EQU13## where C is the total capacitance of the capacitors coupled to the output terminal, Δ

V_out is the change in the output voltage over a clock cycle, and Δ

T is the duration of the clock cycle.

8. The method of claim 4, wherein calculating the total desired output current further includes determining an adjustment current for correcting an error in the output voltage.

9. The method of claim 8, wherein the adjustment current is proportional to a difference between the output voltage and a desired voltage.

10. The method of claim 9, further comprising increasing the desired voltage when the current is higher than a predetermined current level and decreasing the desired voltage when the current is lower than the predetermined current level.

11. The method of claim 1, further comprising determining a number of active switching circuits.

12. The method of claim 11, wherein the number of active switching circuits is generally proportional to the total desired current.

13. The method of claim 12, wherein a new number of active slaves is based on an old number of active switching circuits and the total desired current.

14. The method of claim 12, wherein the determination of the number of active slaves includes a hysteresis effect to avoid excessive changing of the number of active switching circuits.

15. The method of claim 11, further comprising calculating an individual desired output current for each switching circuit, the sum of the individual desired output currents being equal to the total desired output current.

16. The method of claim 15, wherein the individual desired current for the active switching circuits is approximately equal to the total desired current divided by the number of active switching circuits.

17. The method of claim 15, wherein the individual desired current for the inactive slaves is approximately zero.

18. The method of claim 1, wherein calculating the desired total current includes determining a desired voltage which is within a voltage tolerance of a nominal voltage.

19. The method of claim 18, wherein determining the desired voltage includes setting the desired voltage above the nominal voltage when the current is near a maximum current and setting the desired voltage below the nominal voltage when the current is near zero.

20. The method of claim 18, wherein determining the desired voltage includes adjusting the desired voltage by a term that is proportional to the difference between the current voltage and the desired voltage from a previous clock cycle.

21. The method of claim 20, wherein the desired voltage V_desired[n+1] for clock cycle n+1 is determined by the following equation:

##EQU14## where V_nom is a nominal voltage, V_desired[n] is the desired voltage from the clock cycle n, I_load is the current passing through the load, I_max is the maximum current permitted through the load, Δ

V_swing is a change in voltage permitted by the voltage tolerance, and c₁ and c₂ are feedback constants.

22. A voltage regulator having an input terminal to be coupled to an input voltage source and an output terminal to be coupled to a load, comprising:

a) a plurality of switching circuit to intermittently couple the input terminal and the output terminal in response to a digital control signal;

b) a plurality of filters to provide a generally DC output voltage at the output terminal, each filter including an inductor;

c) a plurality of current sensors to generate a plurality of feedback signals derived from the currents passing through the switching circuits; and

d) a digital controller which receives and uses the plurality of feedback signals to

i) calculate an estimated current for each switching circuit, each estimated current representing a current passing through the inductor associated with the switching circuit,

ii) calculate a total desired output current to pass through the inductors which will maintain an output voltage at the output terminal substantially constant, and

iii) generate the digital control signal based on the estimated current and the total desired output current so that a total current passing through the inductors is approximately equal to the total desired output current.

23. A method of determining a total desired current through a switching circuit in a voltage regulator in order to maintain an output voltage at an output terminal substantially constant, the switching circuit intermittently coupling an input terminal to be coupled to an input voltage source to the output terminal to be coupled to a load, the voltage regulator including at least one capacitor coupled to the output terminal, comprising:

measuring a first output voltage at the output terminal at a first time;

measuring a second output voltage at the output terminal at a second time;

calculating an estimated current representing the current flowing through the inductor;

calculating a capacitance current representing a current flowing to or from the at least one capacitor based on a difference between the first output voltage and the second output voltage;

calculating a correction current based on a difference between a desired voltage and one of the first and second output voltages; and

calculating a total desired current for the voltage regulator from a difference between a sum of the estimated current and the correction current, and the capacitance current.

24. A method of operating a voltage regulator having an input terminal to be coupled to an input voltage source, an output terminal to be coupled to a load, and a plurality of switching circuits to alternately couple and decouple the input terminal to the output terminal, comprising:

a) calculating with a digital controller an estimated current for each switching circuit, each estimated current representing a current passing through an inductor associated with the switching circuit;

b) calculating with the digital controller a total desired output current to pass through the inductors which will maintain an output voltage at the output terminal substantially constant; and

c) controlling the switching circuits with the digital controller based on the estimated current and the total desired output current so that a total current passing through the inductors is approximately equal to the total desired output current.