Modulation systems and methods that compensate for DC offset introduced by the digital-to-analog converter and/or the low pass filter thereof

• US 6,100,827 A
• Filed: 09/11/1998
• Issued: 08/08/2000
• Est. Priority Date: 09/11/1998
• Status: Expired due to Term

• Current Assignee: Ericsson, Inc. (Telefonaktiebolaget LM Ericsson)
• Original Assignee: Ericsson, Inc. (Telefonaktiebolaget LM Ericsson)
• Inventors: Boesch, Ronald D., Arpaia, Domenico
• Primary Examiner(s): PHAN, TRONG Q
• Application Number:
  US09/151,622
• Time in Patent Office: 697 Days
• Field of Search: 455/110, 322/103, 375/222, 375/223, 375/279, 375/280, 341/118
• US Class Current: 341/118
• CPC Class Codes: H03C 3/40 using two signal paths the outputs of which have a predetermined phase difference and at least one output being amplitude-modulated
• CPC Class Codes: H04B 1/7101 with estimation filters
• CPC Class Codes: H04B 2201/709709 Methods of preventing interference
• CPC Class Codes: H04L 27/2071 in which the data are represented by the carrier phase, e.g. systems with differential coding

Abstract

Modulation systems and methods compensate for the DC offset that is introduced by the digital-to-analog converter and/or the low pass filter thereof. Compensation is preferably provided in the digital domain, to thereby reduce DC offset within acceptable limits for the modulation that is being used. More preferably, compensation is provided by subtracting from the digital input signal, a digital value representing the DC offset in the filtered analog signal that is introduced by the digital-to-analog converter and/or the low pass filter. A sensor senses the DC offset in the filtered analog signal. An analog-to-digital converter is responsive to the sensor to convert the sensed DC offset into a digital offset signal. A subtractor is responsive to the analog-to-digital converter to subtract the digital DC offset signal from the digital input signal and to apply the digital input signal minus the DC offset signal, to the digital-to-analog converter.

Claims

1. A modulation system for a digital input signal, comprising:

a digital-to-analog converter that converts the digital input signal into an analog signal;

a low pass filter that filters the analog signal to produce a filtered analog signal, at least one of the digital-to-analog converter and the low pass filter introducing DC offset into the filtered analog signal;

a modulator that modulates the filtered analog signal onto a carrier; and

a DC offset compensator that compensates for the DC offset in the filtered analog signal that is introduced by the at least one of the digital-to-analog converter and the low pass filter by subtracting from the digital input signal, a digital value representing the DC offset in the filtered analog signal that is introduced by the at least one of the digital-to-analog converter and the low pass filter.

2. A modulation system according to claim 1 wherein the DC offset compensator comprises:

a sensor that senses the DC offset in the filtered analog signal;

an analog-to-digital converter that is responsive to the sensor to convert the sensed DC offset into a digital DC offset signal; and

a subtractor that is responsive to the analog-to-digital converter to subtract the digital DC offset signal from the digital input signal, and to apply the digital input signal less the DC offset signal, to the digital-to-analog converter.

3. A modulation system according to claim 2 wherein the DC offset compensator further comprises:

a scaler that is responsive to the analog-to-digital converter to scale the digital DC offset signal into a scaled digital DC offset signal;

the subtractor being responsive to the scaler to subtract the scaled digital DC offset signal from the digital input signal.

4. A modulation system according to claim 2 wherein the DC offset compensator further comprises:

a latch that is responsive to the analog-to-digital converter to intermittently latch the digital DC offset signal, and to apply the latched digital DC offset signal to the subtractor, such that the latched digital DC offset signal is subtracted from the digital input signal.

5. A modulation system according to claim 4 wherein the analog-to-digital converter is clocked at a first clock rate and wherein the latch is clocked at a second clock rate that is lower than the first clock rate.

6. A modulation system according to claim 4 wherein the DC offset compensator further comprises:

a scaler that is responsive to the analog-to-digital converter to scale the digital DC offset signal into a scaled digital DC offset signal;

the latch being responsive to the scaler to periodically latch the scaled digital DC offset signal such that the latched scaled digital DC offset signal is subtracted from the digital input signal.

7. A modulation system according to claim 2 wherein the sensor comprises a low pass filter.

8. A modulation system according to claim 2 wherein the analog-to-digital converter is a one-bit delta-sigma analog-to-digital converter.

9. A modulation system according to claim 2 wherein the DC offset compensator further comprises:

a polarity inverter that is responsive to the sensor to periodically invert the polarity of the sensed DC offset and to apply the polarity inverted sensed DC offset to the analog-to-digital converter, the analog-to-digital converter converting the periodically polarity inverted sensed DC offset signal into the digital offset signal.

10. A modulation system according to claim 1:

wherein the digital input signal comprises a selected one of a first digital input signal and a second digital input signal of narrower bandwidth than the first digital input signal; and

wherein the modulator is a dual-bandwidth modulator.

11. A modulation system according to claim 10 wherein the first digital input signal is a CDMA signal and wherein the second digital input signal is an FM signal.

12. A modulation system according to claim 11 wherein the CDMA signal is a direct sequence spread spectrum signal and wherein the FM signal is an analog cellular telephone signal.

13. A modulation system according to claim 1 wherein the modulator is an IQ modulator that modulates in-phase and quadrature filtered analog signals onto a carrier.

14. A modulation system for a digital input signal, comprising:

means for converting the digital input signal into an analog signal;

means for low pass filtering the analog signal to produce a filtered analog signal, at least one of the means for converting and the means for low pass filtering introducing DC offset into the filtered analog signal;

means for modulating the filtered analog signal onto a carrier; and

means for compensating for the DC offset in the filtered analog signal that is introduced by the at least one of the means for converting and the means for low pass filtering by subtracting from the digital input signal, a digital value representing the DC offset in the filtered analog signal that is introduced by the at least one of the means for converting and the means for low pass filtering.

15. A modulation system according to claim 14 wherein the means for compensating comprises:

means for sensing the DC offset in the filtered analog signal;

means for converting the sensed DC offset into a digital DC offset signal; and

means for subtracting the digital DC offset signal from the digital input signal, and for applying the digital input signal less the DC offset signal to the means for converting the digital input signal into an analog signal.

16. A modulation system according to claim 15 wherein the means for compensating further comprises:

means for scaling the digital DC offset signal into a scaled digital DC offset signal;

the means for subtracting being responsive to the means for scaling, to subtract the scaled digital DC offset signal from the digital input signal.

17. A modulation system according to claim 15 wherein the means for compensating further comprises:

means for intermittently latching the digital DC offset signal, and for applying the latched digital DC offset signal to the means for subtracting, such that the latched digital DC offset signal is subtracted from the digital input signal.

18. A modulation system according to claim 17 wherein the means for converting the sensed DC offset into a digital DC offset signal is clocked at a first clock rate and wherein the means for intermittently latching is clocked at a second clock rate that is lower than the first clock rate.

19. A modulation system according to claim 17 wherein the means for compensating further comprises:

means for scaling the digital DC offset signal into a scaled digital DC offset signal;

the means for intermittently latching being responsive to the means for scaling to periodically latch the scaled digital DC offset signal such that the latched scaled digital DC offset signal is subtracted from the digital input signal.

20. A modulation system according to claim 15 wherein the means for sensing comprises means for low pass filtering.

21. A modulation system according to claim 15 wherein the means for converting the sensed DC offset into a digital DC offset signal comprises a one-bit delta-sigma analog-to-digital converter.

22. A modulation system according to claim 15 wherein the compensating means further comprises:

means for periodically inverting the polarity of the sensed DC offset and for applying the polarity inverted sensed DC offset to the means for converting the sensed DC offset in a digital DC offset signal.

23. A modulation system according to claim 14:

wherein the digital input signal comprises a selected one of a first digital input signal and a second digital input signal of narrower bandwidth than the first digital input signal; and

wherein the means for modulating is a dual-bandwidth means for modulating.

24. A modulation system according to claim 23 wherein the first digital input signal is a CDMA signal and wherein the second digital input signal is an FM signal.

25. A modulation system according to claim 24 wherein the CDMA signal is a direct sequence spread spectrum signal and wherein the FM signal is an analog cellular telephone signal.

26. A modulation system according to claim 14 wherein the means for modulating is an IQ modulator that modulates in-phase and quadrature filtered analog signals onto a carrier.

27. A modulation method for a digital input signal, comprising the steps of:

converting the digital input signal into an analog signal;

low pass filtering the analog signal to produce a filtered analog signal, at least one of the converting and low pass filtering steps introducing DC offset into the filtered analog signal;

modulating the filtered analog signal onto a carrier; and

compensating for the DC offset in the filtered analog signal that is introduced by the at least one of the converting and low pass filtering steps by subtracting from the digital input signal, a digital value representing the DC offset in the filtered analog signal that is introduced by the at least one of the converting and low pass filtering steps.

28. A modulation method according to claim 27 wherein the compensating step comprises the steps of:

sensing the DC offset in the filtered analog signal;

converting the sensed DC offset into a digital DC offset signal; and

subtracting the digital DC offset signal from the digital input signal.

29. A modulation method according to claim 28 wherein the compensating step further comprises the step of:

scaling the digital DC offset signal into a scaled digital DC offset signal.

30. A modulation method according to claim 28 wherein the compensating step further comprises the step of:

intermittently latching the digital DC offset signal.

31. A modulation method according to claim 30 wherein the step of converting the sensed DC offset into a digital DC offset signal is clocked at a first clock rate and wherein the step of intermittently latching is clocked at a second clock rate that is lower than the first clock rate.

32. A modulation method according to claim 30 wherein the step of compensating further comprises the step of:

scaling the digital DC offset signal into a scaled digital DC offset signal.

33. A modulation method according to claim 28 wherein the sensing step comprises the step of low pass filtering the filtered analog signal.

34. A modulation method according to claim 28 wherein the step of converting the sensed DC offset into a digital DC offset signal comprises the step of delta-sigma analog-to-digital converting the sensed DC offset into a digital DC offset signal.

35. A modulation method according to claim 28 wherein the compensating step further comprises the step of:

periodically inverting the polarity of the sensed DC offset.

36. A modulation method according to claim 27:

wherein the digital input signal comprises a selected one of a first digital input signal and a second digital input signal of narrower bandwidth than the first digital input signal; and

wherein the modulating step is a dual-bandwidth modulating step.

37. A modulation method according to claim 36 wherein the first digital input signal is a CDMA signal and wherein the second digital input signal is an FM signal.

38. A modulation method according to claim 37 wherein the CDMA signal is a direct sequence spread spectrum signal and wherein the FM signal is an analog cellular telephone signal.

39. A modulation method according to claim 27 wherein the step of modulating comprises the step of IQ modulating in-phase and quadrature filtered analog signals onto a carrier.