Device for classifying electronic components

• US 6,104,985 A
• Filed: 02/20/1998
• Issued: 08/15/2000
• Est. Priority Date: 02/20/1998
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micro Electronics Incorporated
• Inventors: Sowards, Steven R.
• Primary Examiner(s): Hoff, Marc S.
• Assistant Examiner(s): VO, HIEN XUAN
• Application Number:
  US09/026,871
• Time in Patent Office: 907 Days
• Field of Search: 702/117, 702/120, 702/119, 702/123, 324/73.1, 714/736, 714/744, 714/724, 714/741, 714/742, 714/737, 714/718
• US Class Current: 702/117
• CPC Class Codes: G01R 31/317 Testing of digital circuits
• CPC Class Codes: G06F 11/006 Identification G06F11/2289 takes precedence

Abstract

An apparatus for classifying a device as being a first device type or a second device type, includes a fixture for coupling at least one device to be identified to the system; and a processor coupled to the fixture. The processor is programmed to test at least one predetermined terminal of the device and designate the type of the device based upon the results of the test

Claims

1. An apparatus for classifying a device as being a first device type or a second device type, wherein the first device type and the second device type comprise a first number of terminals, the apparatus comprising:

a fixture for coupling at least one device to be identified to the apparatus; and

a processor coupled to the fixture, the processor programmed to test at least one predetermined terminal of the device and designate the device as one of the first and second device types based upon whether the predetermined at least one terminal is used or unused in the device.

2. The apparatus of claim 1, further comprising an element to perform a continuity test of the at lest one predetermined terminal, the processor designating the device type based on the continuity test.

3. The apparatus of claim 2, wherein the processor is programmed to further perform a functional test to verify designation of one of the first and second device types based on the continuity test.

4. The apparatus of claim 1 further comprising a memory storage device accessible by the processor.

5. The apparatus of claim 4 further comprising an operator interface.

6. The apparatus of claim 5 wherein the processor, the memory storage device, and the operator interface are components of a computer.

7. The apparatus of claim 1 wherein the processor is programmed to functionally test the device.

8. The apparatus of claim 1 wherein the device comprises a Memory device.

9. The apparatus of claim 1 wherein the device comprises an SDRAM, the first device type comprises a 4 meg×

4 configuration and the second device type comprises a 2 meg×

8 configuration.

10. An apparatus for distinguishing SDRAM components in a 4 meg×

4 configuration from SDRAM components in a 2 meg×

8 configuration, both SDRAM configurations being packaged in the same package style, the package including a plurality of terminals, the apparatus comprising;

a fixture for coupling at least one SDRAM component to the apparatus; and

a processor coupled to the fixture, the processor programmed to check continuity on the package terminals coupled to input/outputs which are present in the 2 meg×

8 configurations but not present in the 4 meg×

4 configuration.

11. The apparatus of claim 10 wherein the package includes a ground terminal and the processor is programmed to execute the acts of:

applying a constant current to the ground terminal; and

measuring the voltage across each of the package terminals coupled to input/outputs which are present in the 2 meg×

8 configuration but not present in the 4 meg×

4 configuration with reference to ground.

12. The apparatus of claim 10 wherein the processor is programmed to functionally test the component.

13. The apparatus of claim 12 wherein the processor is programmed to execute a functional test which a properly functioning 4 meg×

4 SDRAM will pass but which a properly functioning 2 meg×

8 SDRAM will fail.

14. The apparatus of claim 12 wherein the processor is programmed to functionally test the components failing the continuity check.

15. The apparatus of claim 12 wherein the SDRAM includes a pair of bank memory arrays each having storage cells organized in rows and columns, further comprising the processor being programmed to execute the acts of:

writing data of a given logic level to 1024 columns of one row of one bank;

reading the data written to the 1024 columns in the writing data act; and

over-writing the data read with data of an inverse logic level to the data read.

16. A program storage apparatus storing instructions that when executed by a computer perform a method of classifying a device as a first device type or a second device type, wherein both the first device type and the second device type comprise an identical number of terminals, the method comprising the acts of testing at least one predetermined terminal of the device and classifying the device as the second device type if the predetermined at least one terminal is unused.

17. The program storage apparatus of claim 16 wherein the device includes a ground terminal, the program storage apparatus further storing instructions that when executed by a computer perform the acts of:

applying a constant current to the ground terminal; and

measuring the voltage across the at least one predetermined terminal with reference to ground.

18. The program storage apparatus of claim 16 further storing instructions that when executed by a computer perform a functional test on the device.

19. An apparatus for classifying a device as being a first device type or a second device type, the apparatus comprising:

a fixture for coupling at least one device to be identified to the apparatus; and

a processor adapted to perform a first test of at least one target terminal of the device and to identify the device type based upon the results of the first test, the processor adapted to perform a functional test on the device, wherein the functional test comprises a test which a properly functioning device of the first device type will pass but which a properly functioning device of the second device type will fail.

20. The apparatus of claim 19, wherein the first test includes a continuity test.

21. The apparatus of claim 19, wherein the processor performs the functional test on a device that fails the first test.