Micro-mechanical semiconductor accelerometer

• US 6,105,427 A
• Filed: 07/31/1998
• Issued: 08/22/2000
• Est. Priority Date: 07/31/1998
• Status: Expired due to Term

• Current Assignee: Northrop Grumman Systems Corporation (Northrop Grumman Corporation)
• Original Assignee: Litton Systems Incorporated (Northrop Grumman Corporation)
• Inventors: Stewart, Robert E., Goldman, Arnold E.
• Primary Examiner(s): CHAPMAN JR, JOHN E
• Application Number:
  US09/127,643
• Time in Patent Office: 753 Days
• Field of Search: 73/514.32, 73/514.18, 73/514.21, 73/514.23, 73/514.36, 361/280, 361/283.1, 361/283.3
• US Class Current: 73/514.32
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: G01P 2015/0828 the mass being of the paddle type being suspended at one of its longitudinal ends

Abstract

A precision, micro-mechanical semiconductor accelerometer of the differential-capacitor type comprises a pair of etched opposing cover layers fusion bonded to opposite sides of an etched proofmass layer to form a hermetically sealed assembly. The cover layers are formed from commercially available, Silicon-On-Insulator ("SOI") wafers to significantly reduce cost and complexity of fabrication and assembly. The functional semiconductor parts of the accelerometer are dry-etched using the BOSCH method of reactive ion etching ("RIE"), thereby significantly reducing contamination inherent in prior art wet-etching processes, and resulting in features advantageously bounded by substantially vertical sidewalls.

Claims

1. A semiconductor accelerometer of the differential capacitor type comprising, in combination:

a) top and bottom cover wafer elements, each cover wafer element comprising an associated oxide layer having opposed interior and exterior semiconductor layers integral therewith;

b) a first dielectric layer of predetermined thickness adjacent each said interior semiconductor layer;

c) an aperture within each of said interior semiconductor and first dielectric layers defining an electrode and a peripheral guard ring;

d) a semiconductor proofmass wafer element having opposed sides, said proofmass wafer element having an aperture therethrough defining a central proofmass, a peripheral frame and at least one flexible hinge adjoining said proofmass to said frame, said central proofmass and said peripheral frame being of like thickness; and

e) a second dielectric layer of predetermined thickness overlying said frame on each of said sides of said proofmass wafer element whereby the thicknesses of each of said second dielectric layers define gaps between facing surfaces of said central proofmass and said interior semiconductor layers.

2. An accelerometer as defined in claim 1 wherein said proofmass wafer element is located between opposed ones of said interior layers of said top and bottom cover wafers to form an assembly, with each of said first dielectric layers being fusion-bonded to a respective one of said second dielectric layers to form a hermetic seal.

3. An accelerometer as defined in claim 2 further characterized in that at least one oxide layer extends beyond at least one sidewall of the adjacent electrode.

4. An accelerometer as defined in claim 2 further characterized in that at least one oxide layer extends beyond at least one sidewall of the adjacent peripheral guard ring.

5. An accelerometer as defined in claim 2 further characterized in that at least one second dielectric layer extends beyond at least one sidewall of said peripheral guard ring.

6. An accelerometer as defined in claim 1 wherein each aperture is defined by substantially vertical sidewalls.

7. An accelerometer as defined in claim 6 produced by dry etching using an RIE process.

8. An accelerometer as defined in claim 7 wherein each said RIE process is the BOSCH process.

9. An accelerometer as defined in claim 2 further including at least one hole through said central proofmass.

10. An accelerometer as defined in claim 2 wherein said semiconductor is silicon.

11. An accelerometer as defined in claim 1 further comprising a spaced apart pair of hinges.

12. An accelerometer as defined in claim 1 wherein said dielectric layers are of oxide composition.

13. An accelerometer as defined in claim 1 wherein said dielectric layers are of nitride.

14. A semiconductor accelerometer of the differential capacitor type comprising, in combination:

a) top and bottom cover wafer elements, each cover wafer element comprising an associated oxide layer having opposed interior and exterior semiconductor layers;

b) a first dielectric layer of predetermined thickness adjacent each said interior semiconductor layers;

c) an aperture having vertical sidewalls within each of said interior and first dielectric layers defining an electrode and a peripheral guard ring; and

d) a semiconductor proofmass wafer element having opposed sides, said proofmass wafer element having an aperture therethrough defining a central proofmass having vertical sidewalls, a peripheral frame and at least one flexible hinge adjoining said proofmass to said frame, said central proofmass and said peripheral frame being of like thickness; and

e) a second dielectric layer of predetermined thickness overlying said frame on each of said sides of said proofmass wafer element whereby the thicknesses of each of said second dielectric layers define gaps between facing surfaces of said central proofmass and said interior dielectric layers.

15. An accelerometer as defined in claim 14 wherein said proofmass wafer element is located between opposed ones of said interior layers of said top and bottom cover wafers to form an assembly, with each of said first dielectric layers being fusion-bonded to a respective one of said second dielectric layers to form a hermetic seal.

16. An accelerometer as defined in claim 15 further characterized in that at least one oxide layer extends beyond at least one sidewall of the adjacent electrode.

17. An accelerometer as defined in claim 15 further characterized in that at least one oxide layer extends beyond at least one sidewall of the adjacent peripheral guard ring.

18. An accelerometer as defined in claim 15 further characterized in that at least one second dielectric layer extends beyond at least one sidewall of said peripheral guard ring.

19. An accelerometer as defined in claim 14 produced by dry etching using an RIE process.

20. An accelerometer as defined in claim 19 wherein each said RIE process is the BOSCH process.

21. An accelerometer as defined in claim 15 further including at least one hole through said central proofmass.

22. An accelerometer as defined in claim 14 wherein said dielectric layers are of oxide composition.

23. An accelerometer as defined in claim 14 wherein said dielectric layers are of nitride.

24. An accelerometer as defined in claim 14 wherein said semiconductor is silicon.