Frequency control circuit for oscillator and method therefor

• US 6,107,845 A
• Filed: 11/05/1998
• Issued: 08/22/2000
• Est. Priority Date: 05/13/1998
• Status: Expired due to Term

• Current Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Original Assignee: LG Semico Company Limited (SK Hynix Inc.)
• Inventors: Lee, Yun-Gi
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): Nguyen, Hai L.
• Application Number:
  US09/186,351
• Time in Patent Office: 656 Days
• Field of Search: 327/113, 327/101, 327/103, 327/114, 327/105, 332/117, 365/185.29, 365/185.24
• US Class Current: 327/113
• CPC Class Codes: H03K 3/0315 Ring oscillators

Abstract

A frequency control circuit for an oscillator and a method therefor are disclosed and which frequency control circuit includes a flash cell having a cell transistor, a switching unit for outputting a first voltage to the flash cell in the program mode in accordance with an enable signal and outputting a second voltage in the read mode, a write driver for outputting a program voltage to the flash cell in the program mode in accordance with the enable signal, a bias unit for supplying a current to the flash cell in the read mode in accordance with the enable signal and generating a frequency control voltage which is proportional to a threshold voltage of the flash cell, and an oscillator for varying the frequency in accordance with the thusly generated frequency control voltage.

Claims

1. A frequency control circuit for an oscillator, comprising:

a flash cell having a cell transistor;

a switching unit for outputting a first voltage to the flash cell in a program mode according to an enable signal and outputting a second voltage in a read mode;

a write driver for outputting a program voltage to the flash cell in the program mode according to the enable signal;

a bias unit for supplying a current to the flash cell in the read mode according to the enable signal and generating a frequency control voltage which is proportional to a threshold voltage of the flash cell; and

an oscillator for varying an oscillation frequency based on the frequency control voltage.

2. The circuit of claim 1, wherein when the enable signal is a high level, the program mode of the flash cell is performed, and when the enable signal is a low level, the read mode of the flash cell is performed.

3. The circuit of claim 1, wherein the first voltage is a boosted voltage and the second voltage is a power voltage.

4. The circuit of claim 1, wherein a boosted voltage and program voltage are varied from an initial voltage by Δ

V1 (Δ

V1≦

1V).

5. The circuit of claim 4, wherein an absolute value of the boosted voltage and program voltage are greater than that of the power supply voltage.

6. The circuit of claim 1, wherein the switching unit includes:

a level shifter for outputting a ground voltage in the program mode and outputting a boosted voltage in the read mode;

a pumping unit for outputting a pumping voltage in the read mode;

a first NMOS transistor for outputting a read voltage to the cell transistor according to the pumping voltage;

a second NMOS transistor for pulling-up the output terminal to the level of Vdd-Vt; and

a first PMOS transistor for outputting a boosted voltage to the cell transistor according to the ground voltage outputted from the level shifter in the program mode.

7. The circuit of claim 6, wherein the level shifter includes:

second and third PMOS transistors with its sources receive the boosted voltage, and its gates and drains are crossingly connected with the drains and gates of the second and third PMOS transistors, respectively; and

third and fourth NMOS transistors connected between the drains of the second and third PMOS transistors and the ground, and for receiving an inverted enable signal and the enable signal through its gates.

8. The circuit of claim 1, wherein the write driver includes:

a first transmission transistor for transmitting the enable signal inverted by the inverter;

a latch unit for latching an output of the first transmission transistor; and

the fourth PMOS transistor for outputting a program voltage in accordance with an output signal of the latch unit.

9. The circuit of claim 8, wherein the latch unit latches the output of the first transmission transistor to a ground voltage when the enable signal is a high level, and the latch unit latches the output of the first transmission transistor to the program voltage when the enable signal is a low level.

10. The circuit of claim 8, wherein the first transmission transistor blocks the program voltage outputted from the latch unit from flowing toward the inverter in the read mode.

11. The circuit of claim 8, wherein said latch unit includes:

a fifth PMOS transistor connected between the program voltage terminal and the gate of the fourth PMOS transistor; and

a sixth PMOS transistor and a fifth NMOS transistor connected in series between the program voltage and the ground voltage, with its gates connected to the gate of the fourth PMOS transistor, wherein the gate of the fifth PMOS transistor is connected to the output terminal.

12. The circuit of claim 1, wherein the bias unit includes:

a second transmission transistor with its drain connected the output terminal of the write driver and the cell transistor, and for receiving the inverted enable signal through its gate; and

a seventh PMOS transistor connected between the power supply voltage and the source of the second transmission transistor, wherein the seventh PMOS transistor is a diode type.

13. The circuit of claim 12, wherein said second transmission transistor blocks the current from flowing toward the flash cell in the program mode.

14. In an oscillator circuit of a flash memory having an oscillator frequency control circuit which varies the frequency of an oscillator based on a frequency control voltage, wherein the frequency control circuit comprises:

a flash cell having a cell transistor;

a switching unit for outputting a first voltage for varying a threshold voltage of the cell transistor in a program mode and outputting a second voltage in a read mode;

a write driver for outputting a program voltage to the drain of the cell transistor in the program mode; and

a bias unit for supplying a current to the flash cell in the read mode and generating a frequency control voltage which is proportional to a threshold voltage of the flash cell.

15. The circuit of claim 14, wherein the first voltage is a boosted voltage, and the second voltage is a power voltage.

16. The circuit of claim 15, wherein the boosted voltage and program voltage are varied from an initial voltage by Δ

V1 (Δ

V1≦

1V).

17. The circuit of claim 14, wherein the absolute values of the boosted voltage and program voltage are greater than that of the power voltage.

18. The circuit of claim 14, wherein the bias unit includes:

a transmission transistor, wherein the drain of which is connected to the output terminal of the write driver and the cell transistor, respectively, and the gate of which receives an inverted enable signal; and

a diode-type PMOS transistor connected between the power supply voltage and the source of the transmission transistor.

19. A frequency control circuit for an oscillator, comprising:

a flash cell having a cell transistor;

a switching unit for outputting a first voltage to the flash cell in a program mode;

a write driver for outputting a second voltage to the flash cell in the program mode;

a bias unit for supplying a current to the flash cell in a read mode of the flash cell and generating a frequency control voltage proportional to the threshold voltage of a flash cell; and

an oscillator for varying the frequency based on the generated frequency control voltage.

20. The circuit of claim 19, wherein the first voltage is a boosted voltage, and the second voltage is a program voltage.

21. The circuit of claim 20, wherein the first and second voltage are varied from an initial voltage by Δ

V1 (Δ

V1≦

1V).

22. The circuit of claim 20, wherein the threshold voltage of the cell transistor is proportionally varied based on the first voltage.

23. A frequency control method for an oscillator circuit, said the oscillator circuit varies a frequency control voltage based on a threshold voltage of a flash cell and varies the frequency of an oscillator based on the varied frequency control voltage, said method comprising the steps of:

measuring a oscillation frequency of an oscillator by performing a read operation of the flash cell;

comparing the measured frequency with a reference frequency;

varying the threshold voltage of the cell transistor by outputting first and second voltages to the gate and drain of the cell transistor when two frequencies are not identical;

measuring the oscillation frequency of the oscillator according to a frequency control voltage set based on the varied threshold voltage by performing a read operation of the flash cell; and

repeating the above-described steps until the measured frequency and reference frequency become identical.

24. The method of 23, wherein the first voltage is a boosted voltage, and the second voltage is a program voltage.

25. The method of claim 24, wherein the boosted voltage and program voltage are varied from an initial voltage by Δ

V1 (Δ

V1≦

1V).

26. The method of claim 25, wherein absolute values of the boosted voltage and program voltage are greater than that of the power voltage.