Processor of video signal and display unit using the same
First Claim
1. A video signal processor for outputting a video signal based on reference synchronizing signals which are independent of an input video signal including an input horizontal synchronizing signal and an input vertical synchronizing signal, comprising:
- means for inputting a reference horizontal synchronizing signal;
means for inputting a reference vertical synchronizing signal;
means for generating an output horizontal synchronizing signal having a frequency different from that of said reference horizontal synchronizing signal;
means for generating an output vertical synchronizing signal which is synchronized in phase with said reference vertical synchronizing signal regardless of a value of said input vertical synchronizing signal; and
means for outputting a video signal based on said output horizontal and vertical synchronizing signals.
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Abstract
A video signal processor for outputting a video signal based on an output horizontal synchronizing signal and an output vertical synchronizing signal. The processor includes a circuit inputting a reference horizontal synchronizing signal, a circuit inputting a reference vertical synchronizing signal, a circuit generating an output horizontal synchronizing signal having a frequency different from that of the reference horizontal synchronizing signal, and a circuit generating an output vertical synchronizing signal synchronized in phase with the reference vertical synchronizing signal.
35 Citations
21 Claims
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1. A video signal processor for outputting a video signal based on reference synchronizing signals which are independent of an input video signal including an input horizontal synchronizing signal and an input vertical synchronizing signal, comprising:
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means for inputting a reference horizontal synchronizing signal; means for inputting a reference vertical synchronizing signal; means for generating an output horizontal synchronizing signal having a frequency different from that of said reference horizontal synchronizing signal; means for generating an output vertical synchronizing signal which is synchronized in phase with said reference vertical synchronizing signal regardless of a value of said input vertical synchronizing signal; and means for outputting a video signal based on said output horizontal and vertical synchronizing signals. - View Dependent Claims (2, 3, 4)
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5. A video signal display apparatus for displaying a video signal based on reference synchronizing signals which are independent from an input video signal including an input horizontal synchronizing signal and an input vertical synchronizing signal,
means for inputting a reference vertical synchronizing signal; -
means for inputting a reference horizontal synchronizing signal; means for scanning a display device horizontally with a frequency different from said reference horizontal synchronizing signal; and means for scanning the display device vertically in synchronization in phase with said reference vertical synchronizing signal regardless of a value of said input vertical synchronizing signal. - View Dependent Claims (6, 7)
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8. A video signal display apparatus for displaying a video signal, comprising:
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means for inputting a reference vertical synchronizing signal; means for inputting a reference horizontal synchronizing signal; means for scanning a display device horizontally with a frequency different from said reference horizontal synchronizing signal; and means for scanning the display device vertically in synchronization in phase with said reference vertical synchronizing signal, wherein the means for scanning a display device horizontally with a frequency different from that of a reference horizontal synchronizing signal and the means for scanning the display device vertically in synchronizing signal include; means for generating an output dot clock from the reference horizontal synchronizing signal; means for generating an output horizontal synchronizing signal based on a signal obtained from said output dot clock by dividing the frequency thereof by a frequency division ratio D where D is a natural number; and means for generating an output vertical synchronizing signal based on a signal obtained from said output horizontal synchronizing signal by dividing the frequency thereof by a frequency division ratio L where L is a natural number; wherein a line number P (where P is a natural number) of a reference signal source for generating the reference horizontal synchronizing signal and the reference vertical synchronizing signal is equal to the product (j·
k) of two natural numbers j and k, the frequency division ratio D is a multiple of j and the frequency division ratio L is a multiple of k.
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9. A video signal display apparatus in which a plurality of unit display devices are arranged one-dimensionally or two-dimensionally adjacent to one another, said video signal display apparatus displaying a video signal based on reference synchronizing signals which are independent from an input video signal including an input horizontal synchronizing signal and an input vertical synchronizing signal comprising:
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means for generating a reference vertical synchronizing signal; means for generating a reference horizontal synchronizing signal; and means for scanning all the unit display devices vertically in synchronization in phase with said reference vertical synchronizing signal regardless of a value of said input vertical synchronizing signal. - View Dependent Claims (10, 11, 12, 13)
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14. A video signal display apparatus in which a plurality of unit display devices are arranged one-dimensionally or two-dimensionally adjacent to one another, comprising:
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means for generating a reference vertical synchronizing signal; means for generating a reference horizontal synchronizing signal; and means for scanning all the unit display devices vertically in synchronization in phase with said reference vertical synchronizing signal, wherein the means for scanning vertically a unit display device vertically in synchronization in phase with the reference vertical synchronizing signal of said synchronizing signal includes; means for generating an output dot clock from the reference horizontal synchronizing signal; means for generating an output horizontal synchronizing signal based on a signal obtained from said output dot clock by dividing the frequency thereof by a frequency division ratio D where D is a natural number; and means for generating an output vertical synchronizing signal based on a signal obtained from said output horizontal synchronizing signal by dividing the frequency thereof by a frequency division ratio L where L is a natural number; wherein a line number P (where P is a natural number) of a reference signal source for generating the reference horizontal synchronizing signal and the reference vertical synchronizing signal is equal to the product (j·
k) of two natural numbers j and k, the frequency division ratio D is a multiple of j and the frequency division ratio L is a multiple of k.
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15. A video signal processor for taking a video signal into a memory based on an input horizontal synchronizing signal and an input vertical synchronizing signal and outputting a video signal from the memory based on an output horizontal synchronizing signal and an output vertical synchronizing signal, comprising:
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a circuit inputting an input horizontal synchronizing signal; a circuit inputting an input vertical synchronizing signal; a circuit inputting a reference horizontal synchronizing signal; a circuit inputting a reference vertical synchronizing signal; a circuit generating an output horizontal synchronizing signal having a frequency different from that of said reference horizontal synchronizing signal; a circuit generating an output vertical synchronizing signal synchronized in phase with said reference vertical synchronizing signal regardless of a value of said input vertical synchronizing signal; and a circuit outputting a video signal from the memory based on said output horizontal synchronizing signal and output vertical synchronizing signal. - View Dependent Claims (16)
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17. A video signal processor for taking a video signal into a memory based on an input horizontal synchronizing signal and an input vertical synchronizing signal and outputting a video signal from the memory based on an output horizontal synchronizing signal and an output vertical synchronizing signal, comprising:
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a circuit inputting a reference horizontal synchronizing signal; a circuit inputting a reference vertical synchronizing signal; a circuit generating an output horizontal synchronizing signal having a frequency different from that of said reference horizontal synchronizing signal; a circuit generating an output vertical synchronizing signal synchronized in phase with said reference vertical synchronizing signal; and a circuit outputting a video signal from the memory based on said output horizontal synchronizing signal and output vertical synchronizing signal, wherein the circuit generating an output horizontal synchronizing signal having a frequency different from that of a reference horizontal synchronizing signal and the circuit generating an output vertical synchronizing signal synchronized in phase with a reference vertical synchronizing signal include; a circuit generating an output dot clock from the reference horizontal synchronizing signal; a circuit generating an output horizontal synchronizing signal based on a signal obtained from said output dot clock by dividing the frequency thereof by a frequency division ratio D (where D is a natural number); and a circuit generating an output vertical synchronizing signal based on a signal obtained from said output horizontal synchronizing signal by dividing the frequency thereof by a frequency division ratio L where L is a natural number; wherein a line number P (wherein P is a natural number) of a reference signal source for generating the reference horizontal synchronizing signal and the reference vertical synchronizing signal is equal to the product (j·
k) of two natural numbers j and k, the frequency division ratio D is a multiple of j and the frequency division ratio L is a multiple of k.
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18. A video signal processor for outputting a video signal based on an output horizontal synchronizing signal and an output vertical synchronizing signal, comprising:
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means for inputting a reference horizontal synchronizing signal; means for inputting a reference vertical synchronizing signal; means for generating an output horizontal synchronizing signal having a frequency non-integral multiple times different from that of said reference horizontal synchronizing signal; means for generating an output vertical synchronizing signal which is synchronized in phase with said reference vertical synchronizing signal; wherein the means for generating an output horizontal synchronizing signal having a frequency non-integral multiple times different from that of a reference horizontal synchronizing signal and the means for generating an output vertical synchronizing signal synchronized in phase with a reference vertical synchronizing signal include; means for generating an output dot clock from the reference horizontal synchronizing signal; means for generating an output horizontal synchronizing signal based on a signal obtained from said output dot clock by dividing the frequency thereof by a frequency division ratio D where D is a natural number; and means for generating an output vertical synchronizing signal based on a signal obtained from said output horizontal synchronizing signal by dividing the frequency thereof by a frequency division ratio L where L is a natural number; wherein the product (D·
L) of the frequency division ratio D and the frequency division ratio L becomes a multiple of a line number P (where P is a natural number) of a reference signal source for generating the reference horizontal synchronizing signal and the reference vertical synchronizing signal.
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19. A video signal processor for outputting a video signal based on an output horizontal synchronizing signal and an output vertical synchronizing signal, comprising:
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means for inputting a reference horizontal synchronizing signal; means for inputting a reference vertical synchronizing signal; means for generating an output horizontal synchronizing signal having a frequency non-integral multiple times different from that of said reference horizontal synchronizing signal; means for generating an output vertical synchronizing signal which is synchronized in phase with said reference vertical synchronizing signal, wherein the means for generating an output horizontal synchronizing signal having a frequency non-integral multiple times different from that of a reference horizontal synchronizing signal and the means for generating an output vertical synchronizing signal synchronized in phase with a reference vertical synchronizing signal include; means for generating an output dot clock from the reference horizontal synchronizing signal; means for generating an output horizontal synchronizing signal based on a signal obtained from said output dot clock by dividing the frequency thereof by a frequency division ratio D where D is a natural number; and means for generating an output vertical synchronizing signal based on a signal obtained from said output horizontal synchronizing signal by dividing the frequency thereof by a frequency division ratio L where L is a natural number; wherein a line number P (where P is a natural number) of a reference signal source for generating the reference horizontal synchronizing signal and the reference vertical synchronizing signal is equal to the product (j·
k) of two natural numbers j and k, the frequency division ratio D is a multiple of j and the frequency division ratio L is a multiple of k.
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20. A video signal display apparatus for displaying a video signal based on an output horizontal synchronizing signal and an output vertical synchronizing signal, comprising:
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means for inputting a reference vertical synchronizing signal; means for inputting a reference horizontal synchronizing signal; means for scanning a display device horizontally with a frequency non-integral multiple times different from said reference horizontal synchronizing signal; and means for scanning the display device vertically in synchronization in phase with said reference vertical synchronizing signal, wherein the means for scanning a display device horizontally with a frequency non-integral multiple times different from that of a reference horizontal synchronizing signal and the means for scanning the display device vertically in synchronization in phase with a reference vertical synchronizing signal include; means for generating an output dot clock from the reference horizontal synchronizing signal; means for generating an output horizontal synchronizing signal based on a signal obtained from said output dot clock by dividing the frequency thereof by a frequency division ratio D where D is a natural number; and means for generating an output vertical synchronizing signal based on a signal obtained from said output horizontal synchronizing signal by dividing the frequency thereof by a frequency division ratio L where L is a natural number; wherein the product (D·
L) of the frequency division ratio D and the frequency division ratio L becomes a multiple of a line number P (where P is a natural number) of a reference signal source for generating the reference horizontal synchronizing signal and the reference vertical synchronizing signal.
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21. A video signal display apparatus for displaying a video signal based on an output horizontal synchronizing signal and an output vertical synchronizing signal, comprising:
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means for inputting a reference vertical synchronizing signal; means for inputting a reference horizontal synchronizing signal; means for scanning a display device horizontally with a frequency non-integral multiple times different from said reference horizontal synchronizing signal; and means for scanning the display device vertically in synchronization in phase with said reference vertical synchronizing signal, wherein the means for scanning a display device horizontally with a frequency non-multiple times different from that of a reference horizontal synchronizing signal and the means for scanning the display device vertically in synchronization in phase with a reference vertical synchronizing signal include; means for generating an output dot clock from the reference horizontal synchronizing signal; means for generating an output horizontal synchronizing signal based on a signal obtained from said output dot clock by dividing the frequency thereof by a frequency division ratio D where D is a natural number; and means for generating an output vertical synchronizing signal based on a signal obtained from said output horizontal synchronizing signal by dividing the frequency thereof by a frequency division ratio L where L is a natural number; wherein a line number P (where P is a natural number) of a reference signal source for generating the reference horizontal synchronizing signal and the reference vertical synchronizing signal is equal to the product (j·
k) of two natural numbers j and k, the frequency division ratio d is a multiple of j and the frequency division ratio L is a multiple of k.
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Specification