Method of manufacturing a MOS integrated circuit having components with different dielectrics
First Claim
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1. A method for forming an integrated device, comprising:
- forming in a first section of a substrate having a first conductivity a first region having a second conductivity;
forming in a second section of said substrate a second region having said first conductivity;
forming a first oxide layer on said substrate;
treating said first oxide layer with a nitride;
forming a first conductive layer on said first nitrided oxide layer;
forming a dielectric layer on said first conductive layer;
removing portions of said dielectric, conductive, and nitrided oxide layers that are on said second section of said substrate;
forming a second oxide layer on said second section of said substrate after said removing portions of said dielectric, conductive, and nitrided oxide layers;
treating said second oxide layer with a nitride;
forming a second conductive layer on said second nitrided oxide layer and on a remaining portion of said dielectric layer; and
forming nonvolatile memory cells in said first section of said substrate and forming peripheral transistors in said second section of said substrate.
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Abstract
The method described provides for the formation of thin thermal oxide on areas of a silicon die intended for memory cells and other components of the peripheral circuits of the memory. To improve the quality of the oxide of the cells essentially in terms of resistance to degradation due to the passage of charges through it during the operation of the memory, the method provides for a step for the high-temperature nitriding of the oxide. According to a variant, the nitrided oxide formed on the areas intended for the components of the peripheral circuits is removed and then formed again by a similar thermal oxidation treatment followed by high-temperature nitriding.
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Citations
12 Claims
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1. A method for forming an integrated device, comprising:
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forming in a first section of a substrate having a first conductivity a first region having a second conductivity; forming in a second section of said substrate a second region having said first conductivity; forming a first oxide layer on said substrate; treating said first oxide layer with a nitride; forming a first conductive layer on said first nitrided oxide layer; forming a dielectric layer on said first conductive layer; removing portions of said dielectric, conductive, and nitrided oxide layers that are on said second section of said substrate; forming a second oxide layer on said second section of said substrate after said removing portions of said dielectric, conductive, and nitrided oxide layers; treating said second oxide layer with a nitride; forming a second conductive layer on said second nitrided oxide layer and on a remaining portion of said dielectric layer; and forming nonvolatile memory cells in said first section of said substrate and forming peripheral transistors in said second section of said substrate. - View Dependent Claims (2, 3)
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4. A method for forming an integrated device, comprising:
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forming in a first section of a substrate having a first conductivity a first region having a second conductivity; forming in a second section of said substrate a second region having said first conductivity; forming a first oxide layer on said substrate; treating said first oxide layer with a nitride; forming a first conductive layer on said first nitrided oxide layer; removing portions of said conductive and nitrided oxide layers that are on said second section of said substrate; forming, after said removing portions of said conductive and nitrided oxide layers, a second oxide layer on said second section of said substrate and on a remaining portion of said first conductive layer; treating said second oxide layer with a nitride; forming a second conductive layer on said second nitrided oxide layer; and forming nonvolatile memory cells in said first section of said substrate and forming peripheral transistors in said second section of said substrate. - View Dependent Claims (5, 6)
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7. A method for forming an integrated device, comprising:
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forming in a first section of a substrate having a first conductivity a first region having a second conductivity; forming in a second section of said substrate a second region having said first conductivity; forming a first oxide layer on said substrate; treating said first oxide layer with a nitride; removing a portion of said first nitrided oxide layer that is on said second section of said substrate; forming a second oxide layer on said second section of said substrate layer after said removing; treating said second oxide layer with a nitride; forming a conductive layer on said first and second nitrided oxide layers; and forming memory cells in said first section of said substrate and forming peripheral transistors in said second section of said substrate. - View Dependent Claims (8)
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9. A method of forming structural elements, each comprising a dielectric and an electrically-conductive element thereon, in manufacturing an integrated circuit with memory cells and peripheral circuits on a monocrystalline silicon die, the memory cells and peripheral circuits having structural elements with dielectrics of different characteristics in contact with the silicon die, the method including formation of first and second dielectrics having thermal oxidation treatments to form silicon dioxide on areas of the die intended for the memory cells and peripheral circuits and for the formation of electrically-conductive material on the first and second dielectrics, the formation of the first and second dielectrics comprising:
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a first oxidation step comprising at least one thermal oxidation treatment; a nitriding step; a step for the removal of the silicon dioxide from the areas intended for the peripheral circuits; a reoxidation step comprising at least one thermal oxidation treatment; and a further nitriding step. - View Dependent Claims (10, 11, 12)
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Specification