Semiconductor device

• US 6,114,727 A
• Filed: 01/07/1998
• Issued: 09/05/2000
• Est. Priority Date: 01/09/1997
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Yamaguchi, Masakazu, Ogura, Tsuneo
• Primary Examiner(s): Guay, John
• Application Number:
  US09/003,829
• Time in Patent Office: 972 Days
• Field of Search: 257/212, 257/330, 257/331, 257/342, 257/339
• US Class Current: 257/342
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/66333 Vertical insulated gate bipolar transistors
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7395 Vertical transistors, e.g. vertical IGBT
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT

Abstract

A semiconductor device comprises a high-resistance n type base layer, an n type drain layer formed on one surface of the n type base layer, p type base layers selectively formed at the other surface of the n type base layer, n type source layers selectively formed at surfaces of the p type base layers, p type injection layers selectively formed at the other surface of the n type base layer in regions different from regions where the n type source layers and p type base layers are formed, a trench selectively formed to extend from a surface of each n type source layer through the p type base layer into the n type base layer, a first gate electrode buried in the trench with an insulating film interposed, a drain electrode formed on the n type drain layer, a source electrode formed on the n type source layer, and a second gate electrode formed on the p type injection layer.

Claims

1. A semiconductor device comprising:

a high-resistance first-conductivity-type base layer;

a first-conductivity-type drain layer formed on one surface of the first-conductivity-type base layer;

a second-conductivity-type base layer formed at the other surface of the first-conductivity-type base layer;

a first-conductivity-type source layer formed at one surface of the second-conductivity-type base layer;

a second-conductivity-type injection layer formed at said other surface of the first-conductivity-type base layer in a region different from a region where the second-conductivity-type base layer is formed;

a trench formed at said other surface of the first-conductivity-type base layer between the second-conductivity-type base layer and the second-conductivity-type injection layer so as to extend from a surface of the first-conductivity-type source layer through the second-conductivity-type base layer into the first-conductivity-type base layer, the trench serving as a carrier barrier between the second-conductivity-type injection layer and the first-conductivity-type source layer;

a first gate electrode buried in the trench with an insulating film interposed;

a first main electrode formed on the first-conductivity-type drain layer;

a second main electrode formed on the first-conductivity-type source layer; and

a second gate electrode formed on the second-conductivity-type injection layer.

2. The semiconductor device according to claim 1, wherein a second-conductivity type layer is selectively formed in a surface portion of the first-conductivity type drain layer, which is in contact with the first main electrode.

3. The semiconductor device according to claim 1, wherein the first and second gate electrodes are electrically connected to each other.

4. A semiconductor device according to claim 1, wherein the second main electrode is in contact with a first-conductivity-type semiconductor layer including the first-conductivity-type source layer, but the second main electrode is not in contact with a second-conductivity-type semiconductor layer including the second-conductivity-type base layer.

5. A semiconductor device according to claim 1, wherein the trench has a plurality of trench side portions, and wherein a width of the second-conductivity-type base layer between the trench side portions is less than a width of the second-conductivity-type injection layer between the trench side portions.

6. A semiconductor device comprising:

a high-resistance first-conductivity-type base layer;

a first-conductivity-type drain layer formed on one surface of the first-conductivity-type base layer;

a second-conductivity-type base layer formed at the other surface of the first-conductivity-type base layer;

a first-conductivity-type source layer formed at one surface of the second-conductivity-type base layer;

a first gate electrode formed at the second-conductivity-type base layer between the first-conductivity-type base layer and the first-conductivity-type source layer, with a gate insulating film interposed;

a second-conductivity-type injection layer formed at said other surface of the first-conductivity-type base layer in a region spaced apart from the second-conductivity-type base layer by a predetermined distance;

a first main electrode formed on the first-conductivity-type drain layer;

a second main electrode formed on the first-conductivity-type source layer; and

a second gate electrode formed on the second-conductivity-type injection layer,

wherein the second main electrode is in contact with a first-conductivity-type semiconductor layer including the first-conductivity-type source layer, but the second main electrode is not in contact with a second-conductivity-type semiconductor layer including the second-conductivity-type base layer.

7. The semiconductor device according to claim 6, wherein the first gate electrode is provided on the second-conductivity-type base layer and the first-conductivity-type base layer between the first-conductivity-type source layer and the second-conductivity-type injection layer, with the gate insulating film interposed.

8. A semiconductor device comprising:

a high-resistance first-conductivity-type base layer;

a first-conductivity-type drain layer formed on one surface of the first-conductivity-type base layer;

a second-conductivity-type base layer formed at the other surface of the first-conductivity-type base layer;

a first-conductivity-type source layer formed at one surface of the second-conductivity-type base layer;

first gate electrode formed at the second-conductivity-type base layer between the first-conductivity-type base layer and the first-conductivity-type source layer, with a gate insulating film interposed;

a second-conductivity-type injection layer formed at said other surface of the first-conductivity-type base layer in a region spaced apart from the second-conductivity-type base layer by a predetermined distance;

a first main electrode formed on the first-conductivity-type drain layer;

a second main electrode formed on the first-conductivity-type source layer; and

a second gate electrode formed on the second-conductivity-type injection layer,

wherein the first gate electrode is buried in a trench extending from a surface of the first-conductivity-type source layer through the second-conductivity-type base layer into the first-conductivity-type base layer, with said gate insulating film interposed.

9. A semiconductor device according to claim 8, wherein the second main electrode is in contact with a first-conductivity-type semiconductor layer including the first-conductivity-type source layer, but the second main electrode is not in contact with a second-conductivity-type semiconductor layer including the second-conductivity-type base layer.

10. A semiconductor device comprising:

a high-resistance first-conductivity type base layer;

a first-conductivity-type drain layer formed on one surface of the first-conductivity-type base layer;

a second-conductivity-type base layer formed at the other surface of the first-conductivity-type base layer;

a first-conductivity-type source layer formed at one surface of the second-conductivity-type base layer;

a second-conductivity-type injection layer formed at said other surface of the first-conductivity-type base layer in a region spaced apart from the second-conductivity-type base layer by a predetermined distance;

a first main electrode formed on the first-conductivity-type drain layer;

a second main electrode formed on the first-conductivity-type source layer; and

a gate electrode formed on the second-conductivity-type injection layer,

wherein the second main electrode is in contact with a first-conductivity-type semiconductor layer including the first-conductivity-type source layer, but the second main electrode is not in contact with a second-conductivity-type semiconductor layer including the second-conductivity-type base layer.