Bipolar transistor having high emitter efficiency

• US 6,114,745 A
• Filed: 07/30/1999
• Issued: 09/05/2000
• Est. Priority Date: 07/30/1999
• Status: Expired due to Term

• Current Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Inventors: Liu, Jin, Do-Bento-Vieira, Viviane Marguerite, Fang, Ming, Thomas, Gilles E.
• Primary Examiner(s): Ngo , Ngan V.
• Application Number:
  US09/365,358
• Time in Patent Office: 403 Days
• Field of Search: 257/77, 257/587, 257/588, 257/591
• US Class Current: 257/588
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/7375 having an emitter comprising one or more non-monocrystalline elements of group IV, e.g. amorphous silicon, alloys comprising group IV elements

Abstract

A vertical conduction NPN bipolar transistor with a tunneling barrier of silicon carbide in the emitter providing a high emitter injection efficiency and high, stable current gain. The emitter structure comprises a heavily doped polysilicon layer atop a silicon carbide layer that contacts a shallow, heavily doped emitter region at the surface of an epitaxial silicon layer, which is disposed on a monocrystallinie silicon substrate. The silicon carbide layer is about 100 to 200 angstroms thick and has a composition selected to provide an energy band gap in the 1.8 to 3.5 eV range. The thickness and composition of the silicon carbide can be varied within the preferred ranges to tune the transistor'"'"'s electrical characteristics and simplify the fabrication process.

Claims

1. A bipolar transistor with high emitter efficiency in an integrated circuit semiconductor device, the transistor comprising;

a substrate;

a collector region of a first conductivity type supported by the substrate;

a base region of a second conductivity type supported above the substrate in a PN-junction-forming relationship with the collector region; and

an emitter supported above the substrate in a PN-junction-forming relationship with the base region on a face of the base region opposite from the collector region;

wherein the emitter includes a monocrystalline semiconductor region of the first conductivity type at the base-emitter PN-junction, a polycrystalline semiconductor layer of the first conductivity type spaced from the monocrystalline emitter region, and a tunneling barrier layer interposed between and in contact with the monocrystalline region and polycrystalline layer, the tunneling barrier layer having a thickness of about 100 to 200 angstroms and an energy band gap in the range of about 1.8 to 3.5 eV.

2. The bipolar transistor of claim 1 wherein the first conductivity type is n type and the second conductivity type is p type, whereby an NPN bipolar transistor is formed.

3. The bipolar transistor of claim 2 wherein the tunneling barrier layer consists essentially of silicon carbide.

4. The bipolar transistor of claim 3 wherein the silicon carbide has a composition of Si_x C_y wherein x is approximately 0.7 and y is approximately 0.3.

5. The bipolar transistor of claim 1 wherein the substrate is monocrystalline silicon and the transistor regions are defined within an epitaxial silicon layer formed on the substrate.

6. The bipolar transistor of claim 5 wherein the collector region includes a heavily doped buried collector portion, a lightly doped portion between the buried collector portion and the base region, and a heavily doped sinker portion spaced laterally from the base region and extending vertically between the buried collector portion and an upper semiconductor surface portion, whereby a vertical conduction bipolar transistor structure is defined.

7. A bipolar transistor with high emitter efficiency in an integrated circuit semiconductor device, the transistor comprising;

a substrate;

a collector region of a first conductivity type supported by the substrate;

a base region of a second conductivity type supported above the substrate in a PN-junction-forming relationship with the collector region; and

an emitter supported above the substrate in a PN-junction-forming relationship with the base region on a face of the base region opposite from the collector region;

wherein the emitter includes a monocrystalline semiconductor region of the first conductivity type at the base-emitter PN-junction, a polycrystalline semiconductor layer of the first conductivity type spaced from the monocrystalline emitter region, and a tunneling barrier layer interposed between and in contact with the monocrystalline region and polycrystalline layer, the tunneling barrier layer consisting essentially of silicon carbide and having a thickness of about 100 to 200 angstroms.

8. The bipolar transistor of claim 7 wherein the first conductivity type is n type and the second conductivity type is p type, whereby an NPN bipolar transistor is formed.

9. The bipolar transistor of claim 8 wherein the silicon carbide has a composition selected to provide an energy band gap in the range of about 1.8 to 3.5 eV.

10. The bipolar transistor of claim 8 wherein the silicon carbide has a composition of Si_x C_y wherein x is approximately 0.7 and y is approximately 0.3.

11. The bipolar transistor of claim 7 wherein the substrate is monocrystalline silicon and the transistor regions are defined within an epitaxial silicon layer formed on the substrate.

12. The bipolar transistor of claim 11 wherein the collector region includes a heavily doped buried collector portion, a lightly doped portion between the buried collector portion and the base region, and a heavily doped sinker portion spaced laterally from the base region and extending vertically between the buried collector portion and an upper semiconductor surface portion, whereby a vertical conduction bipolar transistor structure is defined.

13. A bipolar transistor with high emitter efficiency in an integrated circuit semiconductor device, the transistor comprising;

a substrate;

a collector region of a first conductivity type supported by the substrate;

a base region of a second conductivity type supported above the substrate in a PN-junction-forming relationship with the collector region; and

an emitter supported above the substrate in a PN-junction-forming relationship with the base region on a face of the base region opposite from the collector region;

wherein the emitter includes a monocrystalline semiconductor region of the first conductivity type at the base-emitter PN junction, a polycrystalline semiconductor layer of the first conductivity type spaced from the monocrystalline emitter region, and a tunneling barrier layer interposed between and in contact with the monocrystalline region and polycrystalline layer, the tunneling barrier layer consisting essentially of silicon carbide and having a composition selected to provide an energy band gap in the range of about 1.8 to 3.5 eV.

14. The bipolar transistor of claim 13 wherein the first conductivity type is n type and the second conductivity type is p type, whereby an NPN bipolar transistor is formed.

15. The bipolar transistor of claim 14 wherein the silicon carbide has a thickness of about 100 to 200 angstroms.

16. The bipolar transistor of claim 15 wherein the silicon carbide has a composition of Si_x C_y wherein x is approximately 0.7 and y is approximately 0.3.

17. The bipolar transistor of claim 13 wherein the substrate is monocrystalline silicon and the transistor regions are defined within an epitaxial silicon layer formed on the substrate.

18. The bipolar transistor of claim 17 wherein the collector region includes a heavily doped buried collector portion, a lightly doped portion between the buried collector portion and the base region, and a heavily doped sinker portion spaced laterally from the base region and extending vertically between the buried collector portion and an upper semiconductor surface portion, whereby a vertical conduction bipolar transistor structure is defined.

19. The bipolar transistor of claim 17 wherein the polycrystalline semiconductor layer comprises silicon heavily doped with arsenic.

20. The bipolar transistor of claim 17 wherein the substrate comprises p type monocrystalline silicon and the transistor is of the NPN type.