Integrated circuit using a power supply input for digital logic

• US 6,115,595 A
• Filed: 05/04/1998
• Issued: 09/05/2000
• Est. Priority Date: 05/04/1998
• Status: Expired due to Term

• Current Assignee: Trimble Navigation Limited (Trimble Inc.)
• Original Assignee: Trimble Navigation Limited (Trimble Inc.)
• Inventors: Rodal, Eric B., Lau, Chung Y.
• Primary Examiner(s): Nguyen, Lee
• Application Number:
  US09/071,977
• Time in Patent Office: 855 Days
• Field of Search: 455/333, 455/343, 455/456, 455/457, 455/314, 455/323, 342/357.1, 342/357.12, 701/213
• US Class Current: 455/333
• CPC Class Codes: G01S 19/32 Multimode operation in a single same satellite system, e.g. GPS L1/L2
• CPC Class Codes: G01S 19/34 Power consumption
• CPC Class Codes: H04B 1/28 the receiver comprising at least one semiconductor device having three or more electrodes

Abstract

A GPS receiver including an RF GPS integrated circuit downconverter having a standby mode controlled by a power supply input used as a logic signal. The RF GPS integrated circuit includes a synthesizer for generating LO signals, first and second downconverters for using the LO signals for downconverting the GPS signal, and a sampler for using a clock signal for providing in-phase and quadrature phase sampled output signals representative of the GPS signal. The synthesizer includes a multi-mode divider for providing substantially the same first LO frequency at about the midpoint of the L1 and L2 GPS frequencies when either of an external or internally generated reference frequency is selected. A GPS digital signal processor integrated circuit issues the logic signal and the clock signal from a single pin.

Claims

1. A method for selecting an operational mode of an electronic device, comprising steps of:

receiving a first voltage input having a first first voltage state or a second first voltage state, a second voltage input having a first second voltage state or a second second voltage state, and a third voltage input having a first third voltage state or a second third voltage state;

operating a first circuit with power drawn from said first voltage input only when said first voltage input has said first first voltage state;

operating a second circuit with power drawn from said second voltage input only when said second voltage input has said first second voltage state and said first voltage input has said first first voltage state; and

operating a third circuit with power drawn from said second voltage input only when said second voltage input has said first second voltage state and either of said first voltage input has said first first voltage state and said third voltage input has said first third voltage state.

2. The method of claim 1, wherein:

said device operates in a normal operational mode only when said first, said second, and said third circuits are operating; and

said device operates in a standby mode only when said third circuit but not said first circuit and not said second circuit are operating.

3. The method of claim 2, further including steps of:

downconverting a radio frequency (RF) signal in said normal mode with said first and said second circuits; and

issuing a reference signal in said standby mode from said third circuit.

4. The method of claim 3, wherein:

said RF signal is a global positioning system (GPS) signal.

5. The method of claim 4, wherein:

said first, said second, and said third circuits are realized in a first integrated circuit.

6. The method of claim 3, further including a step of:

issuing said third voltage input and a clock signal from a single pin of a second integrated circuit; and

receiving said clock signal at said first circuit for use in providing a downconverted said RF signal from a first integrated circuit.

7. The method of claim 6, wherein:

said second integrated circuit is a GPS digital signal processor (DSP) integrated circuit.

8. An electronic apparatus having selected operational modes, comprising:

a first circuit for receiving a first voltage input having a first first voltage state or a second first voltage state and operating with power drawn from a first voltage input only when said first voltage input has said first first voltage state;

a second circuit for receiving said first voltage input and a second voltage input having a first second voltage state or a second second voltage state, and for operating with power drawn from said second voltage input only when said second voltage input has said first second voltage state and said first voltage input has said first first voltage state; and

a third circuit for receiving said first voltage input, said second voltage input, and a third voltage input having a first third voltage state or a second third voltage state; and

for operating with power drawn from said second voltage input only when said second voltage input has said first second voltage state and either of said first voltage input has said first first voltage state and said third voltage input has said first third voltage state.

9. The apparatus of claim 8, wherein:

the apparatus operates in a normal operational mode only when said first, said second, and said third circuits are operating; and

the apparatus operates in a standby mode only when said third circuit but not said first circuit or said second circuit are operating.

10. The apparatus of claim 9, wherein:

the first and the second circuits are for cooperating for downconverting a radio frequency (RF) signal in said normal mode; and

the third circuit is for issuing a reference signal in said standby mode.

11. The apparatus of claim 10, wherein:

said RF signal is a global positioning system (GPS) signal.

12. The apparatus of claim 11, wherein:

the first, the second, and the third circuits are realized in a first integrated circuit.

13. The apparatus of claim 10, further including:

a second integrated circuit for issuing said third voltage input and a clock signal from a single pin; and

receiving said clock signal at said first circuit for use in providing a downconverted said RF signal from a first integrated circuit.

14. The apparatus of claim 13, wherein:

said second integrated circuit is a GPS digital signal processor (DSP) integrated circuit.