Direct logical block addressing flash memory mass storage architecture

• US 6,115,785 A
• Filed: 05/13/1999
• Issued: 09/05/2000
• Est. Priority Date: 07/31/1995
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Lexar Media Incorporated (Micron Technology, Inc.)
• Inventors: Estakhri, Petro, Assar, Mamud
• Primary Examiner(s): BRAGDON, REGINALD GLENWOOD
• Application Number:
  US09/311,045
• Time in Patent Office: 481 Days
• Field of Search: 711/103, 711/104, 711/156, 711/203
• US Class Current: 711/103
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 12/023 Free address space management
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 16/08 Address circuits; Decoders; Word-line control circuits
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
• CPC Class Codes: G11C 29/765 in solid state disks
• CPC Class Codes: G11C 29/82 for EEPROMs

Abstract

A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.

Claims

1. A nonvolatile storage system having nonvolatile memory, the storage system being coupled to an external digital system for storing binary information therefor in the nonvolatile memory, the external digital system including means for generating a plurality of logical block addresses for use in storing or reading data, the storage system comprising:

a. a volatile memory device having a plurality of volatile memory locations each of which is uniquely addressable by one of the logical block addresses, and wherein each of the volatile memory locations is configured to store a physical block address without requiring the storage of a corresponding logical block address;

b. one or more nonvolatile memory devices having a plurality of nonvolatile data blocks, each block being selectively programmable and erasable, being uniquely addressable by one of the physical block addresses, and having associated therewith at least one flag stored indicative of the status of the block; and

c. a controller for receiving a block of data from the external digital system to be stored in the one or more nonvolatile memory devices, for receiving a target logical block address from the external system, for identifying a free block within the nonvolatile data blocks having no data stored therein, for storing the physical block address of the free block in the volatile memory location that corresponds to the target logical block address, and for periodically erasing all blocks of the nonvolatile memory devices having flags which are set, whereby an erase cycle is not needed each time the external system writes to the storage device, wherein the at least one flag associated with the block is copied from the nonvolatile memory devices to the volatile memory locations.

2. A nonvolatile storage system as recited in claim 1 wherein the target logical block address is stored in the corresponding block of the one or more nonvolatile memory devices.

3. A nonvolatile storage system as recited in claim 1 wherein the volatile memory device is comprised of a random access memory (RAM) type of memory.

4. A nonvolatile storage system as recited in claim 1 wherein the one or more nonvolatile memory devices are comprised of FLASH cells.

5. A nonvolatile storage system as recited in claim 1 wherein the volatile memory device is located externally to the controller.

6. A nonvolatile storage system as recited in claim 1 wherein the volatile memory device is resident within the controller.

7. A nonvolatile storage system as recited in claim 1 wherein the controller includes means for addressing one of the plurality of volatile memory locations using a desired logical block address, means for retrieving a physical block address stored in the volatile memory location that corresponds to the desired logical block address, means for reading a block within the one or more nonvolatile memory devices identified by the retrieved physical block address and means for coupling the block read from the one or more nonvolatile memory devices to the external system.

8. A nonvolatile storage system as recited in claim 1 wherein the at least one flag includes a used/free flag for indicating whether or not a block contains data.

9. A nonvolatile storage system as recited in claim 8 wherein the used/free flag is stored in the volatile memory locations.

10. A nonvolatile storage system as recited in claim 9 wherein the controller for further storing the logical block addresses in corresponding blocks of the one or more nonvolatile memory devices and during power-up utilizing the stored logical addresses for copying the used/free flags to the volatile memory locations.

11. A nonvolatile storage system as recited in claim 1 wherein each of the plurality of volatile memory locations being further uniquely addressable by one of the physical block addresses, the controller, upon power-up, being operative to address the volatile memory locations using the physical block addresses for updating the used/free flags of the volatile memory locations with the corresponding used/free flags of the one or more nonvolatile memory devices.

12. A nonvolatile storage system as recited in claim 11 wherein the logical block addresses are stored in corresponding blocks of the one or more nonvolatile memory devices and upon power-up, the controller being operative to read the logical block addresses stored in the nonvolatile memory device, address the volatile memory locations by the read logical block addresses, and based upon the updated used/free flags, update the physical block addresses in the volatile memory locations that were most recently assigned to the logical block addresses prior to power-up.

13. A nonvolatile storage system as recited in claim 1 wherein the at least one flag associated with the block is copies from the nonvolatile memory devices to the volatile memory locations during power-up.

14. A nonvolatile storage system as recited in claim 1 wherein the at least one flag includes old/new flags for indicating, when set, that the block contains data that has been superseded.

15. A nonvolatile storage system as recited in claim 14 wherein the controller includes means for periodically erasing blocks that have set old/new flags.

16. A nonvolatile storage system as recited in claim 14 wherein the old/new flag is stored in the volatile memory locations.

17. A nonvolatile storage system as recited in claim 16 wherein the controller further stores the logical block addresses in corresponding blocks of the one or more nonvolatile memory devices and during power-up utilizing the stored logical addresses for copying the old/new flags to the volatile memory locations.

18. A nonvolatile storage system as recited in claim 16 wherein each of the plurality of volatile memory locations being further uniquely addressable by one of the physical block addresses, the controller, upon power-up, being operative to address the volatile memory locations using the physical block addresses for updating the old/new flag of the volatile memory locations with the corresponding old/new flags of the one or more nonvolatile memory devices.

19. A nonvolatile storage system as recited in claim 16 wherein the logical block addresses are stored in corresponding blocks of the one or more nonvolatile memory devices and upon power-up, the controller being operative to read the logical block addresses stored in the nonvolatile memory devices, address the volatile memory locations by the logical block addresses, and based upon the updated old/new flags, update the physical block addresses in the volatile memory locations that were most recently assigned to the logical block addresses prior to power-up.

20. A nonvolatile storage system as recited in claim 1 wherein the at least one flag includes a defect flag for indicating whether or not the block is defective.

21. A nonvolatile storage system as recited in claim 20 wherein the defect flag is stored in the volatile memory locations.

22. A nonvolatile storage system as recited in claim 21 wherein the controller further stores the logical block addresses in corresponding blocks of the one or more nonvolatile memory devices and during power-up utilizing the stored logical addresses for copying the defect flags to the volatile memory locations.

23. A nonvolatile storage system as recited in claim 21 wherein each of the plurality of volatile memory locations being further uniquely addressable by one of the physical block addresses, the controller, upon power-up, being operative to address the volatile memory locations using the physical block addresses for updating the defect flag of the volatile memory locations with the corresponding old/new flags of the one or more nonvolatile memory devices.

24. A nonvolatile storage system as recited in claim 21 wherein the logical block addresses are stored in corresponding blocks of the one or more nonvolatile memory devices and upon power-up, the controller being operative to read the logical block addresses stored in the nonvolatile memory devices, address the volatile memory locations by the logical block addresses, and based upon the updated defect flags, update the physical block addresses in the volatile memory locations that were most recently assigned to the logical block addresses prior to power-up.

25. A nonvolatile memory system having a nonvolatile memory, the storage system being coupled to an external digital system for storing binary information therefore in the nonvolatile memory, the storage system for receiving, from the external digital system, a plurality of logical block addresses for identifying the binary information and generating a plurality of physical block addresses corresponding to the logical block addresses, each physical block address for use in identifying locations within the nonvolatile memory for storing or reading the binary information, comprising:

a. a volatile memory device having a plurality of volatile memory locations each of which is uniquely addressable by one of the logical block addresses and one of the physical block addresses, the volatile memory device configured to store physical block addresses in volatile memory locations identified by the logical block addresses and further being configured to store flags in volatile memory locations identified by the physical block addresses;

b. one or more nonvolatile memory devices each having a plurality of nonvolatile data blocks, each block being selectively programmable and erasable, being uniquely addressable by one of the physical block addresses, and having associated therewith shadow flags for indicating the status of the block, the one or more nonvolatile memory devices further having storage locations for storing logical block addresses in corresponding blocks of the one or more nonvolatile memory devices; and

c. a controller operative to receive a block of data, identified by a target logical block address, from the external digital system for storage thereof in the one or more nonvolatile memory devices, to identify a free block within the nonvolatile data blocks having no data stored therein and having a particular physical block address, to store the received block of data and the target logical block address in the free block, to update the shadow flags so as to reflect the current status of the block identified by the target logical block address, and to store the particular physical block address and the shadow flags in the volatile memory location identified by the target logical block address, wherein during power-up the physical block addresses are used to address the volatile memory locations and update the flags thereof with the shadow flags of the nonvolatile data blocks and the logical block addresses that are stored in the nonvolatile data blocks are utilized to update the physical block addresses of the volatile memory locations with the physical block addresses that were most recently assigned to the logical block addresses prior to power-up and further wherein periodically all blocks of the one or more nonvolatile memory devices having shadow flags which are set are erased thereby avoiding the need for an erase cycle each time the external system writes to the storage device.

26. A nonvolatile memory system as recited in claim 25 wherein the volatile memory device is comprised of random access memory (RAM) type of memory.

27. A nonvolatile memory system as recited in claim 25 wherein the one or more nonvolatile memory devices arc comprised of FLASH cells.

28. A nonvolatile memory system as recited in claim 25 wherein the volatile memory device is located within the controller.

29. A nonvolatile memory system as recited in claim 25 wherein the volatile memory device is located externally to the controller.

30. A nonvolatile memory system as recited in claim 25 wherein the shadow flags of each block include a used/free flag for indicating whether or not the corresponding block contains data.

31. A nonvolatile memory system as recited in claim 25 wherein the shadow flags of each block include a defective flag for indicating whether or not the corresponding block is defective.

32. A nonvolatile memory system as recited in claim 25 wherein the shadow flags of each block further include a old/new flag for indicating, when set, that the corresponding block contains data that has been superseded.

33. A nonvolatile memory system as recited in claim 32 wherein the controller includes means for periodically erasing blocks within the nonvolatile memory devices that have set old/new flags.