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Semiconductor die metal layout for flip chip packaging

  • US 6,118,180 A
  • Filed: 11/03/1997
  • Issued: 09/12/2000
  • Est. Priority Date: 11/03/1997
  • Status: Expired due to Term
First Claim
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1. A metal layout on a semiconductor die, comprising:

  • a surface metal bonding pad;

    a metal region adjacent to said pad and spaced between about 1.0 and 3.0 μ

    m from said pad; and

    an under bump metal pad overlying said surface metal pad and at least a portion of said adjacent metal region, and connected to said surface metal pad through a via.

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