Low comment mode impedence differential driver and applications thereof

• US 6,118,438 A
• Filed: 04/07/1999
• Issued: 09/12/2000
• Est. Priority Date: 03/18/1997
• Status: Expired due to Term

• Current Assignee: ATI International SRL (Advanced Micro Devices, Inc.)
• Original Assignee: ATI Technologies Incorporated (Advanced Micro Devices, Inc.)
• Inventors: Ho, Chak Cheung Edward
• Primary Examiner(s): Luu, Matthew
• Application Number:
  US09/287,807
• Time in Patent Office: 524 Days
• Field of Search: 345/87, 345/88, 345/98, 345/100, 345/204, 345/153-155
• US Class Current: 345/204
• CPC Class Codes: G06F 3/147 using display panels
• CPC Class Codes: G09G 3/3611 Control of matrices with row and column drivers
• CPC Class Codes: H03K 19/00315 in field-effect transistor circuits
• CPC Class Codes: H03K 19/00361 in field effect transistor circuits
• CPC Class Codes: H03K 19/018521 of complementary type, e.g. CMOS

Abstract

A low common mode impedance differential driver includes an independent current source, a switching module, a dependent current source, and a bias control circuit. The independent and dependent current sources are operably coupled to the switching module to provide first and second current paths through the switching module. The bias control circuit is operably coupled to the dependent current source and to the differential output produced by the switching module. The bias control circuit provides a control signal to the dependent current source that causes the common mode of the differential output to be maintained within a desired tolerance.

Claims

1. A low common mode impedance differential driver comprises:

an independent current source;

a switching module operably coupled to the independent current source, wherein taps in the switching module provide a differential output from an input;

a dependent current source operably coupled to the switching module; and

a bias control circuit operably coupled to the differential output and the dependent current source, wherein the bias control circuit provides a control signal to the dependent current source, which causes common mode of the differential output to be maintained within a desired tolerance.

2. The differential driver of claim 1, wherein the bias control circuit further comprises:

a voltage divider operably coupled to the differential output;

a voltage reference;

an amplifier having a first input coupled to a tap of the voltage divider, a second input coupled to the voltage reference, and an output coupled to a control input of the dependent current source.

3. The differential driver of claim 1, wherein the switching module further comprises a full bridge inverter operably coupled to generate a first current path between the independent current source and the dependent current source when the input is a logic 1 and to generate a second current path between the independent current source and the dependent current source when the input is a logic 0.

4. The differential driver of claim 3 further comprises over voltage protection circuitry operably coupled to the switching module, wherein the over voltage protection circuitry protects inverters of the switching module when another driver is driving differential output terminals at a higher voltage than a supply voltage of the differential driver, wherein the differential output is coupled to the differential output terminals.

5. A parallel to serial transmitter comprises:

shift register operably coupled to receive a plurality of digital bits in parallel;

gating circuitry operably coupled to the shift register to produce, in a serial manner, an input representative of each of the plurality of digital bits;

an independent current source;

a switching module operably coupled to the independent current source and the gating circuitry, wherein taps in the switching module produce a differential output from the input;

a dependent current source operably coupled to the switching module; and

a bias control circuit operably coupled to the differential output and the dependent current source, wherein the bias control circuit provides a control signal to the dependent current source, which causes common mode of the differential output to be maintained within a desired tolerance.

6. The parallel to serial transmitter of claim 5, wherein the bias control circuit further comprises:

a voltage divider operably coupled to the differential output;

a voltage reference;

an amplifier having a first input coupled to a tap of the voltage divider, a second input coupled to the voltage reference, and an output coupled to a control input of the dependent current source.

7. The parallel to serial transmitter of claim 5, wherein the switching module further comprises a full bridge inverter operably coupled to generate a first current path between the independent current source and the dependent current source when the input is a logic 1 and to generate a second current path between the independent current source and the dependent current source when the input is a logic 0.

8. The parallel to serial transmitter of claim 7 further comprises over voltage protection circuitry operably coupled to the switching module, wherein the over voltage protection circuitry protects inverters of the switching module when another driver is driving differential output terminals at a higher voltage than a supply voltage of the differential driver, wherein the differential output is coupled to the differential output terminals.

9. A video graphics circuit comprises:

a video graphics engine operably coupled to receive at least one of graphics data and video data, wherein the video graphics engine generates display data from the at least one of the graphics data and the video data, wherein color components of the display data are n-bits in length; and

a parallel to serial transmitter operably coupled to the video graphics engine, wherein the parallel to serial transmitter includes;

shift register operably coupled to receive a plurality of bits of the color components in parallel;

gating circuitry operably coupled to the shift register to produce, in a serial manner, an input representative of each of the plurality of bits;

an independent current source;

a switching module operably coupled to the independent current source and the gating circuitry, wherein taps in the switching module produce a differential output from the input;

a dependent current source operably coupled to the switching module; and

a bias control circuit operably coupled to the differential output and the dependent current source, wherein the bias control circuit provides a control signal to the dependent current source, which causes common mode of the differential output to be maintained within a desired tolerance.

10. The video graphics circuit of claim 9, wherein the bias control circuit further comprises:

a voltage divider operably coupled to the differential output;

a voltage reference;

an amplifier having a first input coupled to a tap of the voltage divider, a second input coupled to the voltage reference, and an output coupled to a control input of the dependent current source.

11. The video graphics circuit of claim 9, wherein the switching module further comprises a full bridge inverter operably coupled to generate a first current path between the independent current source and the dependent current source when the input is a logic and to generate a second current path between the independent current source and the dependent current source when the input is a logic 0.

12. The video graphics circuit of claim 10 further comprises over voltage protection circuitry operably coupled to the switching module, wherein the over voltage protection circuitry protects inverters of the switching module when another driver is driving differential output terminals at a higher voltage than a supply voltage of the differential driver, wherein the differential output is coupled to the differential output terminals.