High frequency switch device, front end unit and transceiver

• US 6,118,985 A
• Filed: 07/24/1998
• Issued: 09/12/2000
• Est. Priority Date: 07/25/1997
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kameyama, Atsushi, Kawakyu, Katsue, Nagaoka, Masami
• Primary Examiner(s): Nguyen, Lee
• Application Number:
  US09/121,939
• Time in Patent Office: 781 Days
• Field of Search: 455/78, 455/82, 455/83, 455/79, 455/80, 455/81, 333/103, 333/104, 327/404
• US Class Current: 455/78
• CPC Class Codes: H03K 17/063 in field-effect transistor switches
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H03K 2017/066 Maximizing the OFF-resistance instead of minimizing the ON-resistance
• CPC Class Codes: H03K 2217/0054 Gating switches, e.g. pass gates
• CPC Class Codes: H03K 2217/009 Resonant driver circuits
• CPC Class Codes: H04B 1/48 in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter H04B1/46 takes precedence

Abstract

In order to minimize the chip area and improve the linear characteristics obtained when large signals are inputted, a high frequency switch device comprises first, second and third terminals (3, 4, 6); a first circuit composed of a first FET (11), and a first inductor (21) and a first capacitor (25) both connected with the first FET (11) in parallel to each other, one end of the first circuit being connected to the first terminal (3); and a second circuit composed of a second FET (12), and a second inductor (22) and a second capacitor (26) both connected with the second FET (12) in parallel to each other, one end of the second circuit being connected to the first circuit and the other end of the second circuit being connected to the second terminal (4). Further, the high frequency switch device is characterized in that a first control signal is applied to a gate of the first FET (11) via a resistance (31); a second control signal is applied to a gate of the second FET (12) via a resistance (33); the third terminal (6) is connected to a common junction point of the first and second circuits; and a predetermined potential is applied to the common junction point.

Claims

1. A high frequency switch device, comprising:

first, second and third-terminals;

a first circuit composed of a first FET, and a first inductor and a first capacitor both connected with said first FET in parallel to each other, one end of said first circuit being connected to said first terminal; and

a second circuit composed of a second FET, and a second inductor and a second capacitor both connected with the second FET in parallel to each other, one end of said second circuit being connected to said first circuit and the other end of said second circuit being connected to said second terminal, and

wherein a first control signal is applied to a gate of the first FET via a resistance;

a second control signal is applied to a gate of the second FET via a resistance;

said third terminal is connected to a common junction point of said first and second circuits; and

a predetermined potential is applied to the common junction point.

2. The high frequency switch device of claim 1, wherein the high frequency switch device is used to switch radio signal paths when radio signals are given from a transmitter to an antenna or when radio signals are given from the antenna to a receiver;

said first and second terminals are connected to the receiver and the transmitter, respectively; and

said third terminal is connected to the antenna.

3. The high frequency switch device of claim 1, wherein the first and second capacitors are of linear element, respectively.

4. The high frequency switch device of claim 1, wherein the first and second capacitors are of parallel plane capacitance, respectively.

5. The high frequency switch device of claim 4, wherein the first inductor, a non-linear capacitance obtained when the first FET is turned off, and the first capacitor form a parallel resonance circuit;

the second inductor, another non-linear capacitance obtained when the second FET is turned off, and the second capacitor form another parallel resonance circuit; and

the first and second inductors are both so determined as to satisfy a predetermined parallel resonance condition at a predetermined frequency, respectively.

6. The high frequency switch device of claim 4, wherein the high frequency switch device is constructed on a single substrate as one chip;

and the first and second capacitors are of metal-insulator-metal structure.

7. The high frequency switch device of claim 6, wherein the first FET is arranged between the first inductor and the first capacitor on a device chip;

and the second FET is arranged between the second inductor and the second capacitor on the same device chip.

8. A front end unit used at a radio frequency stage of a transceiver and having a high frequency switch device as a radio frequency switch, the high frequency switch device comprising:

first, second and third terminals;

a first circuit composed of a first FET, and a first inductor and a first capacitor both connected with said first FET in parallel to each other, one end of said first circuit being connected to said first terminal; and

a second circuit composed of a second FET, and a second inductor and a second capacitor both connected with the second FET in parallel to each other, one end of said second circuit being connected to said first circuit and the other end of said second circuit being connected to said second terminal, and

wherein a first control signal is applied to a gate of the first FET via a resistance;

a second control signal is applied to a gate of the second FET via a resistance;

said third terminal is connected to a common junction point of said first and second circuits; and

a predetermined potential is applied to the common junction point.

9. The front end unit of claim 8, wherein the high frequency switch device is used to switch radio signal paths when radio signals are given from a transmitter to an antenna or when radio signals are given from the antenna to a receiver;

said first and second terminals are connected to the receiver and the transmitter, respectively; and

said third terminal is connected to the antenna.

10. The front end unit of claim 8, wherein the first and second capacitors are of linear element, respectively.

11. The front end unit of claim 10, wherein the first and second capacitors are of parallel plane capacitance, respectively.

12. The front end unit of claim 11, wherein the first inductor, a non-linear capacitance obtained when the first FET is turned off, and the first capacitor form a parallel resonance circuit;

the second inductor, another non-linear capacitance obtained when the second FET is turned off, and the second capacitor form another parallel resonance circuit; and

the first and second inductors are both so determined as to satisfy a predetermined parallel resonance condition at a predetermined frequency, respectively.

13. The front end unit of claim 11, wherein the high frequency switch device is constructed on a single substrate as one chip;

and the first and second capacitors are of metal-insulator-metal structure.

14. The front end unit of claim 13, wherein the first FET is arranged between the first inductor and the first capacitor on a device chip;

and the second FET is arranged between the second inductor and the second capacitor on the same device chip.

15. A transceiver having a high frequency switch device for switching radio signal paths when radio signals are given from a transmitter to an antenna or when radio signals are given from the antenna to a receiver, the high frequency switch device comprising:

first, second and third terminals connected to the transmitter, the receiver and the antenna, respectively;

a first circuit composed of a first FET, and a first inductor and a first capacitor both connected with said first FET in parallel to each other, one end of said first circuit being connected to said first terminal; and

a second circuit composed of a second FET, and a second inductor and a second capacitor both connected with the second FET in parallel to each other, one end of said second circuit being connected to said first circuit and the other end of said second circuit being connected to said second terminal, and

wherein a first control signal is applied to a gate of the first FET via a resistance;

a second control signal is applied to a gate of the second FET via a resistance;

said third terminal is connected to a common junction point of said first and second circuits; and

a predetermined potential is applied to the common junction point.

16. The transceiver of claim 15, wherein the first and second capacitors are of linear element, respectively.

17. The transceiver of claim 16, wherein the first and second capacitors are of parallel plane capacitance, respectively.

18. The transceiver of claim 17, wherein the first inductor, a non-linear capacitance obtained when the first FET is turned off, and the first capacitor form a parallel resonance circuit;

the second inductor, another non-linear capacitance obtained when the second FET is turned off, and the second capacitor form another parallel resonance circuit; and

the first and second inductors are both so determined as to satisfy a predetermined parallel resonance condition at a predetermined frequency, respectively.

19. The transceiver of claim 17, wherein the high frequency switch device is constructed on a single substrate as one chip;

and the first and second capacitors are of metal-insulator-metal structure.

20. The transceiver of claim 19, wherein the first FET is arranged between the first inductor and the first capacitor on a device chip;

and the second FET is arranged between the second inductor and the second capacitor on the same device chip.