Semiconductor storage device and method of controlling it

• US 6,119,245 A
• Filed: 02/23/1998
• Issued: 09/12/2000
• Est. Priority Date: 08/06/1997
• Status: Expired due to Term

• Current Assignee: LAPIS Semiconductor Co., Ltd. (ROHM Co., Ltd.)
• Original Assignee: OKI Electric Industry Company Limited
• Inventors: Hiratsuka, Shinji
• Primary Examiner(s): Beausoliel, Jr., Robert W.
• Assistant Examiner(s): Weir, James G.
• Application Number:
  US09/028,130
• Time in Patent Office: 932 Days
• Field of Search: 714/6, 714/7, 714/8, 365/200, 365/201, 365/185.09, 711/154, 711/170
• US Class Current: 714/6.11
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles

Abstract

The aim is to improve reliability and life of a semiconductor storage device using memory elements for which deterioration is a problem. In a semiconductor disk device equipped with a flash memory section 110 having memory elements M(0)˜M(9) having a plurality of sectors used as ordinary sectors or spare sectors, and a disk controller section 120 that performs data writing/reading in respect of memory elements M(0)˜M(9) in accordance with address information input from outside, there are provided a data error information management table 127 that stores for each memory element the situation regarding occurrence of write/read error of memory elements M(0)˜M(9), a micro CPU 131 that detects deterioration of memory elements in accordance with the situation regarding occurrence of write/read error stored in data error information management table 127, and an address conversion table 128 that effects conversion of address information such that memory elements M(0)˜M(9) for which deterioration has been detected by micro CPU 131 are not used.

Claims

1. A semiconductor storage device comprising:

a storage section comprising a plurality of memory elements having a plurality of sectors that are used as ordinary sectors and spare sectors, wherein said memory elements are accessed in accordance with a first memory number indicated in a first address information;

an input section for inputting an externally received second address information which indicates a second memory number;

an address conversion table for storing conversion information which indicates a relationship between said first memory numbers and said second memory numbers, and for converting said second address information into said first address information by using said conversion information;

a control section for performing writing/reading of data to said memory elements in accordance with said first memory number indicated in said first address information obtained by said address conversion table;

a data error information management table for storing error data indicative of an occurrence of write/read errors of said memory elements; and

a deterioration detection section for detecting a deterioration of said memory elements in accordance with said error data stored in said data error information management table, and for rewriting a first memory number of said address conversion table such that a memory element that is detected as being deteriorated by said deterioration detection section is not used.

2. The semiconductor storage device according to claim 1, wherein said data error information management table stores said error data based on a result of calculation of a prescribed calculation processing using at least one of correctable write/read errors or uncorrectable write/read errors.

3. The semiconductor storage device according to claim 2, wherein said data error information management table stores for each sector, as said error data, at least one of a the number of occurrences of correctable write/read errors or a number of occurrences of uncorrectable write/read errors.

4. The semiconductor storage device according to claim 2, wherein said data error information management table stores for each sector, as said error data, at least one of a number of occurrences of correctable write/read errors or a number of occurrences of uncorrectable write/read errors, and a number of write operations and a number of read operations.

5. The semiconductor storage device according to claim 2, wherein said data error information management table stores for each sector, as said error data, at least one of a number of occurrences of correctable write/read errors or a number of occurrences of uncorrectable write/read errors in each of a prescribed number of write/read operations.

6. The semiconductor storage device according to claim 2, wherein said data error information management table stores for each sector, as said error data, at least one of a number of consecutive occurrences of correctable write/read errors or a number of consecutive occurrences of uncorrectable write/read errors.

7. The semiconductor storage device according to claim 2, wherein said deterioration detection section deems a sector for which said result of calculation exceeds a first threshold value to be a deteriorated sector, and wherein said deterioration detection section deems a memory element for which a number of said deteriorated sectors exceeds a second threshold value to be a deteriorated memory element.

8. The semiconductor storage device according to claim 1, wherein, in the writing/reading of data after detection of a deteriorated memory element by said deterioration detection section, said address conversion table converts said address information such that said memory elements that are not specified as being deteriorated memory elements are specified by consecutive addresses.

9. The semiconductor storage device according to claim 1, wherein, in writing/reading of data after a deteriorated memory element has been detected by said deterioration detection section, said address conversion table converts said address information such that a spare sector in another memory element is employed instead of the respective sectors in said deteriorated memory elements.

10. The method of controlling a semiconductor storage device according to claim 1, wherein said memory elements are flash memories and said semiconductor storage device is a semiconductor disk device.

11. A method of controlling a semiconductor storage device, said method comprising:

storing error data indicative of an occurrence of write/read errors of a plurality of memory elements in a data error information management table, each of said memory elements having a plurality of sectors employed as ordinary sectors and as spare sectors, wherein said memory elements are accessed in accordance with a first memory number indicated in a first address information;

detecting a deterioration of said memory elements using a deterioration detection section in accordance with said error data stored in said data error information management table;

receiving an externally supplied second address information containing a second address number;

converting said second address information into said first address information by altering said second memory number into said first memory number by accessing an address conversion table which stores information indicating a relationship between said first memory numbers and said second memory numbers;

performing writing/reading of data to said memory elements in accordance with a first address number indicated in said first address information converted in said converting step; and

rewriting said first memory number of said address conversion table such that a memory element that is detected to have deteriorated by said deterioration detection section is not used.

12. The method of controlling a semiconductor storage device according to claim 11, wherein said storing of error data includes performing a prescribed calculation processing using at least either correctable write/read errors or uncorrectable write/read errors and storing a result of the calculation processing in said data error information management table as said error data.

13. The method of controlling a semiconductor storage device according to claim 12, wherein said calculating processing includes calculating for each sector at least either a number of occurrences of correctable write/read errors or a number of occurrences of uncorrectable write/read errors.

14. The method of controlling a semiconductor storage device according to claim 12, wherein said calculation processing includes calculating for each sector at least either a number of occurrences of correctable write/read errors or a number of occurrences of uncorrectable write/read errors, as well as a number of write operations and a number of read operations.

15. The method of controlling a semiconductor storage device according to claim 12, wherein said calculation processing includes calculating, for each sector, at least either a number of correctable write/read errors or a number of uncorrectable write/read errors generated in each of a prescribed number of writing/reading operations.

16. The method of controlling a semiconductor storage device according to claim 12, wherein said said calculation processing includes calculating, for each sector, at least either a number of consecutive occurrences of correctable write/read errors or a number of occurrences of uncorrectable write/read errors.

17. The method of controlling a semiconductor storage device according to claim 12, wherein said detecting a deterioration of said memory elements includes detecting a sector for which said result of the calculation processing exceeds a first threshold value to be a deteriorated sector and deems a memory element whose number of deteriorated sectors exceeds a second threshold value to be a deteriorated memory element.

18. The method of controlling a semiconductor storage device according to claim 11, wherein said said second address information is converted by said address conversion table such that, in subsequent data writing/reading operations, when a deteriorated memory element is detected by said deterioration detection section, said memory elements which are not specified as being deteriorated memory elements and in which deterioration is not detected are specified by consecutive addresses.

19. The method of controlling a semiconductor storage device according to claim 11, wherein said said second address information is converted by said address conversion table such that, in subsequent data writing/reading operations, when a deteriorated memory element is detected by said deterioration detection section, spare sectors in another memory element are employed instead of the respective sectors in the deteriorated memory element.

20. The method of controlling a semiconductor storage device according to claim 11, wherein said memory elements are flash memories and said semiconductor storage device is a semiconductor disk device.