Testing system for evaluating integrated circuits, a burn-in testing system, and a method for testing an integrated circuit

• US 6,119,255 A
• Filed: 01/21/1998
• Issued: 09/12/2000
• Est. Priority Date: 01/21/1998
• Status: Expired due to Term

• Current Assignee: Ovonyx Memory Technology, LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Akram, Salman
• Primary Examiner(s): De Cady, Albert
• Assistant Examiner(s): LAMARRE, GUY J
• Application Number:
  US09/009,973
• Time in Patent Office: 965 Days
• Field of Search: 714/30, 714/733, 714/724, 714/734, 714/742, 324/760, 340/870.01, 257/666
• US Class Current: 714/724
• CPC Class Codes: G01R 31/2862 Chambers or ovens; Tanks
• CPC Class Codes: G01R 31/2868 Complete testing stations; systems; procedures; software aspects
• CPC Class Codes: G01R 31/2879 related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads
• CPC Class Codes: G01R 31/3025 Wireless interface with the DUT

Abstract

A burn-in testing system for evaluating a circuit under test, the system including a burn-in board having a plurality of receptacles, at least one of which being sized to receive the circuit under test, test interface circuitry supported by the board and coupled to the receptacles, the test interface circuitry including a transmitter and receiver; power conductors supported by the board, coupled to the receptacles and configured to be connected to a power supply to power the circuit under test during burn-in testing, control and data signal conductors, a burn-in oven having a compartment selectively receiving the burn-in board and being configured to apply heat within the compartment, and an interrogator unit supported by the burn-in oven, the interrogator unit being configured to send commands to the test interface circuitry to exercise the circuit under test optically or via radio communication and to receive responses to the commands optically or via radio communication. A method for testing an integrated circuit having operational circuitry formed thereon, optically and via radio frequency.

Claims

1. A burn-in testing system for evaluating a circuit under test, the system comprising:

a burn-in board having a plurality of receptacles, at least one of which being sized to receive the circuit under test;

test interface circuitry supported by the board and coupled to the receptacles, the test interface circuitry including a transmitter and receiver;

power conductors supported by the board, coupled to the receptacles and configured to be connected to a power supply to power the circuit under test during burn-in testing;

a burn-in oven having a compartment selectively receiving the burn-in board and being configured to apply heat within the compartment; and

an interrogator unit supported by the burn-in oven and having a radio communication range extending to the test interface circuitry, the interrogator unit being configured to send commands to the test interface circuitry to exercise the circuit under test via radio communication and to receive responses to the commands via radio communication.

2. A burn-in testing system in accordance with claim 1 wherein the test interface circuitry is mounted to the board.

3. A burn-in testing system in accordance with claim 1 wherein the power conductors comprise conductive traces formed on the board.

4. A burn-in testing system in accordance with claim 1 and further comprising data lines supported by the board, coupled between the receptacles and the test interface circuitry and configured to provide an exchange of information between the test interface circuitry and the circuit under test.

5. A burn-in testing system in accordance with claim 1 and further comprising conductive traces formed on the board to couple the receptacles to the test interface circuitry.

6. A burn-in testing system in accordance with claim 1 wherein the circuit under test includes operational circuitry, and wherein the test interface circuitry cycles the operational circuitry according to the commands from the interrogator unit.

7. A burn-in testing system in accordance with claim 6 wherein the interrogator unit is configured to provide an identification code as part of the interrogating information, wherein the test interface circuitry includes ID labels assigned to respective receptacles, and wherein the test interface circuitry is configured to compare the identification code provided by the interrogator unit with the ID label of the receptacle for the circuit under test, the test interface circuitry being configured to test cycle the operational circuitry when the identification code matches the ID label.

8. A burn-in testing system in accordance with claim 1 wherein the test interface circuitry is separately coupled to the respective receptacles such that the interrogator, in communication with the test interface circuitry, can select a receptacle, and thereby select a desired one of a plurality of circuits under test, for test cycling.

9. A burn-in testing system in accordance with claim 1 wherein the receptacles respectively comprise sockets sized to receive an integrated circuit.

10. A burn-in testing system in accordance with claim 1 wherein at least one of the receptacles is sized to receive an integrated circuit.

11. A testing system for evaluating integrated circuits, the testing system comprising:

a burn-in oven defining a chamber;

an interrogator unit having a transmitter having a radio communication range, the interrogator unit being configured to transmit interrogating information within the chamber via radio communication;

a receiver configured for communications with the transmitter; and

a burn-in board selectively received within the chamber and remotely from the interrogator unit, but within the radio communication range, the burn-in board including a plurality of receptacles sized to receive respective individual integrated circuits, the burn-in board supporting the receiver, the burn-in board having burn-in test conductors coupling the receiver circuitry to respective receptacles, and having power conductors configured to couple the respective receptacles to a power source to supply power to the integrated circuits during burn-in testing, the receptacles including sockets electrically connecting the respective integrated circuits to the burn-in test conductors and to the power conductors.

12. A testing system in accordance with claim 11 and further comprising test interface circuitry supported by the board, the test interface circuitry including the receiver.

13. A testing system in accordance with claim 12 and configured to perform dynamic testing.

14. A testing system in accordance with claim 12 and configured to perform dynamic testing wherein the integrated circuits are cycled on and off during a period of time greater than twelve hours and less than thirty-six hours.

15. A testing system in accordance with claim 12 and configured to perform dynamic testing wherein the integrated circuits are cycled on and off during a period of time greater than twelve hours and less than thirty-six hours while the oven heats the chamber to a temperature greater than 100 degrees Celsius.

16. A testing system in accordance with claim 12 and configured to perform dynamic testing wherein the integrated circuits are cycled on and off during a period of time of at least twelve hours while the oven heats the chamber to a temperature greater than 100 degrees Celsius.

17. A testing system in accordance with claim 12 wherein the test interface circuitry is secured to the board.

18. A testing system in accordance with claim 12 and configured to perform static testing.

19. A testing system in accordance with claim 11 wherein the power conductors extend at least partially along the board.

20. A testing system in accordance with claim 11 wherein the burn-in oven includes a power source accessible from the chamber, and wherein the power conductors are removably coupled to the power source.

21. A testing system in accordance with claim 11 and further comprising a power source to which the power conductors are selectively coupled, the power source being configured to supply to the integrated circuits a voltage higher than the normal operating voltage of the respective integrated circuits.

22. A testing system in accordance with claim 11 wherein the test interface circuitry is separately coupled to the respective receptacles for individualized testing of integrated circuits.

23. A burn-in testing system for evaluating a circuit under test, the system comprising:

a burn-in board having a plurality of receptacles sized to respectively receive the circuit under test;

test interface circuitry supported by the board and coupled to the receptacles, the test interface circuitry including an optical coupler;

power conductors supported by the board, coupled to the receptacles and configured to be connected to a power supply to power the circuit under test during burn-in testing;

a burn-in oven having a compartment selectively receiving the burn-in board being configured to apply heat within the compartment; and

an interrogator unit supported by the burn-in oven, the interrogator unit including an optical coupler and being configured to optically send commands to the test interface circuitry, via the optical coupler, to exercise the circuit under test and to optically receive responses to the commands, via the optical coupler.

24. A burn-in testing system in accordance with claim 23 wherein at least one of the receptacles is sized to receive an integrated circuit.

25. A burn-in testing system in accordance with claim 23 and further comprising a fiber optic cable coupling the interrogator unit to the test interface circuitry.

26. A testing system for evaluating integrated circuits, the testing system comprising:

a burn-in oven defining a chamber;

an interrogator unit having an optical transmitter having an optical communication range, the interrogator unit being configured to optically transmit interrogating information into the chamber;

an optical receiver configured to communicate with the transmitter; and

a burn-in board selectively received within the chamber and remotely from the interrogator unit, but within the optical communication range, the burn-in board including a plurality of receptacles sized to receive respective individual integrated circuits, the burn-in board supporting the optical receiver, the burn-in board having burn-in test conductors coupling the optical receiver to respective receptacles, and having power conductors configured to couple the respective receptacles to a power source to supply power to the integrated circuits during burn-in testing, the receptacles including sockets electrically connecting the respective integrated circuits to the burn-in test conductors and to the power conductors.

27. A testing system in accordance with claim 26 and further comprising test interface circuitry supported by the board, the test interface circuitry including the optical receiver.

28. A method for testing an integrated circuit having operational circuitry formed thereon, the method comprising:

providing a burn-in board having a plurality of receptacles configured to receive integrated circuits and to electrically interface with the operational circuitry in the integrated circuits;

forming test interface circuitry on the burn-in board, the test interface circuitry being electrically coupled to the receptacles;

providing an interrogator unit;

locating the burn-in board remotely from the interrogator unit;

placing the integrated circuit in one of the receptacles;

powering the operational circuitry and the test interface circuitry;

heating the integrated circuit;

transmitting interrogating information from the interrogator unit to the test interface circuitry on the burn-in board via radio communication;

test cycling the operational circuitry according to the interrogating information;

transmitting test data output by the operational circuitry in response to the interrogating information back to the interrogator unit via radio communication; and

examining the test data at the interrogator unit to determine whether the integrated circuit has a defect.

29. A method in accordance with claim 28 and further comprising:

marking respective receptacles with ID labels;

transmitting an identification code from the interrogator unit;

comparing the identification code with the ID label; and

test cycling the operational circuitry of an integrated circuit in a given receptacle only when the identification code matches the ID label of the given receptacle.

30. A method for testing an integrated circuit having operational circuitry formed thereon, the method comprising:

providing a burn-in board having a plurality of receptacles configured to receive integrated circuits and to electrically interface with the operational circuitry in the integrated circuits;

forming test interface circuitry on the burn-in board, the test interface circuitry being electrically coupled to the receptacles;

providing an interrogator unit;

locating the burn-in board remotely from the interrogator unit;

lacing the integrated circuit in one of the receptacles;

powering the operational circuitry and the test interface circuitry;

optically transmitting interrogating information from the interrogator unit to the test interface circuitry on the burn-in board;

test cycling the operational circuitry according to the interrogating information;

optically transmitting test data output by the operational circuitry in response to the interrogating information back to the interrogator unit; and

examining the test data at the interrogator unit to determine whether the integrated circuit has a defect.

31. A method in accordance with claim 30 and further comprising:

marking respective receptacles with ID labels;

transmitting an identification code from the interrogator unit;

comparing the identification code with the ID label; and

test cycling the operational circuitry of an integrated circuit in a given receptacle only when the identification code matches the ID label of the given receptacle.

32. A method in accordance with claim 30 and further comprising heating the integrated circuit.

33. A method for testing an integrated circuit having operational circuitry formed thereon, the method comprising:

providing a burn-in board having a plurality of receptacles configured to receive integrated circuits and to electrically interface with the operational circuitry in the integrated circuits;

forming test interface circuitry on the burn-in board, the test interface circuitry being electrically coupled to the receptacles;

providing an interrogator unit;

locating the burn-in board remotely from the interrogator unit;

placing the integrated circuit in one of the receptacles;

powering the operational circuitry and the test interface circuitry;

transmitting interrogating information from the interrogator unit to the test interface circuitry on the burn-in board via radio communication; and

test cycling the operational circuitry according to the interrogating information.

34. A method for testing an integrated circuit having operational circuitry formed thereon, the method comprising:

providing a burn-in board having a plurality of receptacles configured to receive integrated circuits and to electrically interface with the operational circuitry in the integrated circuits;

forming test interface circuitry on the burn-in board, the test interface circuitry being electrically coupled to the receptacles;

providing an interrogator unit;

locating the burn-in board remotely from the interrogator unit;

placing the integrated circuit in one of the receptacles;

powering the operational circuitry and the test interface circuitry;

optically transmitting interrogating information from the interrogator unit to the test interface circuitry on the burn-in board; and

test cycling the operational circuitry according to the interrogating information.

35. A method for testing an integrated circuit having operational circuitry formed thereon, the method comprising:

providing an interrogator unit;

placing the integrated circuit in a receptacle on a burn-in board having test interface circuitry coupled to the receptacle;

powering the operational circuitry and the test interface circuitry;

transmitting interrogating information from the interrogator unit to the test interface circuitry on the burn-in board via radio communication; and

test cycling the operational circuitry according to the interrogating information.

36. A method in accordance with claim 35 and further comprising:

marking respective receptacles with ID labels;

transmitting an identification code from the interrogator unit;

comparing the identification code with the ID label; and

test cycling the operational circuitry of an integrated circuit in a given receptacle only when the identification code matches the ID label of the given receptacle.

37. A method for testing an integrated circuit having operational circuitry formed thereon, the method comprising:

providing an interrogator unit;

placing the integrated circuit in a receptacle on a burn-in board having test interface circuitry coupled to the receptacle;

powering the operational circuitry and the test interface circuitry;

optically transmitting interrogating information from the interrogator unit to the test interface circuitry on the burn-in board; and

test cycling the operational circuitry according to the interrogating information.

38. A method in accordance with claim 37 and further comprising heating the integrated circuit.

39. A burn-in testing system for evaluating a circuit under test, the system comprising:

a burn-in board configured to receive the circuit under test;

test interface circuitry supported by the board and configured to be coupled to the circuit under test, the test interface circuitry including a transmitter and receiver;

power conductors supported by the board, configured to be coupled to the circuit under test and configured to be connected to a power supply to power the circuit under test during burn-in testing;

a burn-in oven having a compartment selectively receiving the burn-in board and being configured to apply heat within the compartment; and

an interrogator unit supported by the burn-in oven and having a radio communication range extending to the test interface circuitry, the interrogator unit being configured to send commands to the test interface circuitry to exercise the circuit under test via radio communication and to receive responses to the commands via radio communication.

40. A burn-in testing system in accordance with claim 39 wherein the test interface circuitry is mounted to the board.

41. A burn-in testing system in accordance with claim 39 and further comprising a plurality of receptacles on the board, sized to receive the circuit under test, and coupled to the test interface circuitry.

42. A burn-in testing system in accordance with claim 41 and further comprising conductive traces on the board and coupling the receptacles to the test interface circuitry.

43. A burn-in testing system in accordance with claim 41 wherein the power conductors comprise conductive traces on the board and coupling the receptacles to the power supply.

44. A testing system for evaluating integrated circuits, the testing system comprising:

a burn-in oven defining a chamber;

an interrogator unit having a transmitter having a radio communication range, the interrogator unit being configured to transmit interrogating information within the chamber via radio communication;

a receiver configured for communications with the transmitter; and

a burn-in board selectively received within the chamber and remotely from the interrogator unit, but within the radio communication range, the burn-in board being configured to support respective individual integrated circuits, the burn-in board supporting the receiver, the burn-in board having burn-in test conductors configured to couple the receiver circuitry to respective integrated circuits, and having power conductors configured to couple the respective integrated circuits to a power source to supply power to the integrated circuits during burn-in testing.

45. A testing system in accordance with claim 44 and further comprising test interface circuitry supported by the board, the test interface circuitry including the receiver.

46. A testing system in accordance with claim 45 and configured to perform dynamic testing.

47. A testing system in accordance with claim 45 and configured to perform dynamic testing wherein the integrated circuits are cycled on and off during a period of time greater than twelve hours and less than thirty-six hours.

48. A testing system in accordance with claim 45 and configured to perform dynamic testing wherein the integrated circuits are cycled on and off during a period of time of at least twelve hours while the oven heats the chamber to a temperature greater than 100 degrees Celsius.

49. A testing system in accordance with claim 45 wherein the test interface circuitry is secured to the board.

50. A testing system in accordance with claim 45 and configured to perform static testing.

51. A testing system in accordance with claim 44 wherein the power conductors extend at least partially along the board.

52. A testing system in accordance with claim 44 wherein the burn-in oven includes a power source accessible from the chamber, and wherein the power conductors are removably coupled to the power source.

53. A testing system in accordance with claim 44 and further comprising a power source to which the power conductors are selectively coupled, the power source being configured to supply to the integrated circuits a voltage higher than the normal operating voltage of the respective integrated circuits.

54. A testing system in accordance with claim 44 wherein the test interface circuitry is separately coupled to the respective receptacles for individualized testing of integrated circuits.