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Digital clock recovery circuit with phase interpolation

  • US 6,122,336 A
  • Filed: 09/11/1997
  • Issued: 09/19/2000
  • Est. Priority Date: 09/11/1997
  • Status: Expired due to Term
First Claim
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1. A method for recovering a clock signal, the method comprising:

  • receiving a reference clock signal;

    generating a plurality of clock signals from the clock signal, the plurality of clock signals having a plurality of phases with a first phase difference between phases within the plurality of phases;

    interpolating the plurality of clock signals to generate a second plurality of clock signals, wherein the second plurality of clock signals has a second plurality of phases with a second phase difference between phases within the plurality of phases; and

    selecting a clock signal from the second plurality of clock signals, wherein the clock signal forms a recovered clock signal.

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