Q inductor with multiple metallization levels

• US 6,124,624 A
• Filed: 02/27/1998
• Issued: 09/26/2000
• Est. Priority Date: 02/28/1997
• Status: Expired due to Term

• Current Assignee: Telefonaktiebolaget LM Ericsson
• Original Assignee: Telefonaktiebolaget LM Ericsson
• Inventors: Verreck, Maurice, Van Roosmalen, Marcel Wilhelm Rudolf Martin
• Primary Examiner(s): HARDY, DAVID B
• Application Number:
  US09/031,594
• Time in Patent Office: 942 Days
• Field of Search: 257/531, 336/186-200
• US Class Current: 257/531
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01F 2017/0086 on semiconductor substrate
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

In an integrated circuit, such as an RF oscillator device, having multiple mutually separated levels of electrically conducting material, each level comprises a plurality of adjacently arranged strips separated from another. Strips of different levels are electrically parallel connected, forming a plurality of stacks of parallel connected strips. The stacks are connected to form an inductor having a first and second terminal.

Claims

1. An integrated circuit comprising multiple mutually separated levels of electrically conducting material, each level comprising a plurality of adjacently arranged strips separated from another, a strip comprising a first and second end, wherein strips of different levels are electrically parallel connected, such to form a plurality of stacks of parallel connected strips, said stacks being interconnected to form an inductor having a first and second terminal.

2. An integrated circuit according to claim 1, wherein the stacks are connected in parallel, having the first terminal at the interconnected first ends and the second terminal at the interconnected second ends of the stacks.

4. An integrated circuit according to claim 1, wherein strips of different levels, the strips forming a stack, are oppositely arranged.

6. An integrated circuit according to claim 1, wherein strips of adjacent levels are interconnected.

7. An integrated circuit according to claim 1, comprising circuit elements connecting to the first and second terminal of at least one inductor and arranged to form an oscillator device.

3. An integrated circuit comprising multiple mutually separated levels of electrically conducting material, each level comprising a plurality of adjacently arranged strips separated from another, a strip comprising a first and second end, wherein strips of different levels are electrically parallel connected, such to form a plurality of stacks of parallel connected strips, said stacks being interconnected to form an inductor having a first and second terminal, wherein the stacks are series connected, having the first terminal at a first end and the second terminal at a second end of the series connection.

5. An integrated circuit comprising multiple mutually separated levels of electrically conducting material, each level comprising a plurality of adjacently arranged strips separated from another, a strip comprising a first and second end, wherein strips of different levels are electrically parallel connected, such to form a plurality of stacks of parallel connected strips, said stacks being interconnected to form an inductor having a first and second terminal, wherein strips of different levels are arranged in a staggered fashion.

8. An integrated circuit comprising multiple mutually separated levels of electrically conducting material, each level comprising a plurality of adjacently arranged strips separated from another, a strip comprising a first and second end, wherein strips of different levels are electrically parallel connected, such to form a plurality of stacks of parallel connected strips, said stacks being interconnected to form an inductor having a first and second terminal, wherein the levels of electrically conducting material are formed on a semiconductor substrate, the levels being separated by layers of electrically insulating material, and wherein the electrically conducting material is a metal.

9. An integrated circuit according to claim 8, wherein the levels of conducting material and electrically insulating material are formed by a back etching semiconductor manufacturing technique.

10. An integrated circuit according to claim 8, wherein the semiconductor substrate is silicon and gallium arsenide (GaAs).

11. An integrated circuit according to claim 10, wherein the electrically insulating material is silicon dioxide.

12. An integrated circuit according to claim 8, wherein the metal is one of aluminum, tungsten alloy and gold.

13. An integrated circuit according to claim 8, wherein the electrically insulating material is silicon dioxide.

14. An integrated circuit according to claim 8, wherein the metal is one of aluminum, tungsten alloy and gold.