Liquid crystal display device

• US 6,124,903 A
• Filed: 08/25/1999
• Issued: 09/26/2000
• Est. Priority Date: 08/28/1998
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Iida, Masayuki
• Primary Examiner(s): Parker, Kenneth
• Assistant Examiner(s): Qi, Mike
• Application Number:
  US09/382,394
• Time in Patent Office: 398 Days
• Field of Search: 349/38, 349/44, 349/39
• US Class Current: 349/38
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: H01L 29/78633 with a light shield

Abstract

In a liquid crystal display device including a light shielding film, the liquid crystal display device having a structure capable of avoiding a gate line delay is provided. In the liquid crystal display device including a thin film transistor formed on a substrate, a portion of a light shielding film for shielding against incident light from the side of the substrate, except its portion for shielding the pixel transistor, is disposed under an additional capacitance line or between a gate line and the additional capacitance line and at a position avoiding the gate line, so that parasitic capacitance between the film and the gate line is suppressed.

Claims

1. A liquid crystal display device, comprising:

a first substrate on which a pixel transistor formed of a semiconductor layer, and a light shielding film for shielding against incident light or scattered light are formed, wherein a portion of said light shielding film except its portion for shielding said pixel transistor is disposed beneath an additional capacitance line at a position avoiding said gate line, said light shielding film being connected to a potential so that an increase in parasitic capacitance between the light shielding film and the gate line is suppressed, a load amount on the gate line is suppressed, and a delay of gate potential is small;

said first semiconductive layer being located beneath the capacitance line and spaced from the lights shielding film by a gate insulating film and substantially in register with the light shielding film at a location not beneath the gate line;

a second substrate disposed opposite to said first substrate and with a predetermined interval; and

a liquid crystal layer held between said first substrate and said second substrate.

2. A liquid crystal display device according to claim 1, wherein said light shielding film is disposed between said substrate and said pixel transistor.

3. A liquid crystal display device according to claim 1, wherein said light shielding film is disposed over said pixel transistor.

4. A liquid crystal display device, comprising:

a first substrate and a second substrate opposite said first substrate with a liquid crystal layer held between said first and second substrate;

a light shielding film formed on said first substrate;

a pixel transistor formed of a first silicon layer on said first substrate, said light shielding film for shielding against incident or scattered light;

a gate line;

a capacitance line, said capacitance line and said gate line formed of a second silicon layer;

a gate insulating film;

said light shielding film formed substantially beneath said first silicon layer and extending so as to terminate at a location which is not beneath said gate line, and disposed under said capacitance line, said light shielding film being connected to a fixed potential so that an increase in parasitic capacitance between the light shielding film and the gate line is suppressed, a load amount on said gate line is suppressed and a delay of gate potential is small.

5. The liquid crystal display device as set forth in claim 4, wherein said first silicon layer is located beneath said capacitance line and spaced from said light shielding film by a gate insulating film and substantially in register with said light shielding film at a location not beneath said gate line.

6. The liquid crystal display device as set forth in claim 5 wherein said light shielding film is made from a metal and is connected to a metal layer having a fixed potential.

7. A liquid crystal display device comprising:

a first substrate;

a semiconductor layer formed on said first substrate;

a gate line;

a capacitance line;

a light shielding film formed substantially beneath said semiconductor layer and extending so as to terminate at a location which is not beneath said gate line and disposed under said capacitance line, the light shielding film being connected to a fixed potential so that an increase in parasitic capacitance between the light shielding film and the gate line is suppressed, a load amount on the gate line is suppressed and a delay of gate potential is small;

the first semiconductor layer being located beneath the capacitance line and spaced from the light shielding film by a gate insulating film and substantially in register with the light shielding film at a location not beneath the gate line;

the light shielding film being made from metal and connected to a metal layer having a fixed potential.

8. The liquid crystal display device according to claim 7, wherein said first semiconductor layer is a silicon layer.