Method of controlling the switching DI/DT and DV/DT of a MOS-gated power transistor

• US 6,127,746 A
• Filed: 10/08/1997
• Issued: 10/03/2000
• Est. Priority Date: 10/21/1996
• Status: Expired due to Term

• Current Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Original Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Inventors: Clemente, Stefano
• Primary Examiner(s): PALADINI, ALBERT WILLIAM
• Application Number:
  US08/946,870
• Time in Patent Office: 1,091 Days
• Field of Search: 307/130, 307/131, 327/108, 327/380, 327/381, 327/440, 327/419, 326/83
• US Class Current: 307/131
• CPC Class Codes: G01R 19/12 Measuring rate of change
• CPC Class Codes: G01R 31/2621 for testing field effect transistors, i.e. FET's
• CPC Class Codes: H03K 17/166 Soft switching
• CPC Class Codes: H03K 17/168 in composite switches

Abstract

The switching di/dt and switching dv/dt of a MOS gate controlled ("MOS-gated") power device are controlled by respectively controlling the voltage and current waveforms. Open loop control of the turn-on of the MOS-gated device is provided by coupling a common terminal of a current generator circuit, which provides a current to the gate of the MOS device, to a first resistor for controlling the switching dv/dt. At the detection of a negative dv/dt, the common terminal of the current generator circuit is then coupled to a second resistor for controlling the switching di/dt. The first and second resistors are, in turn, coupled to the source terminal fo the MOS-gated device. An analogous operation provides turn-off control of the MOS-gated power device. Closed loop control is also provided by measuring the switching dv/dt and the switching di/dt which are then fed back to the circuit to control the current supplied to the gate of the MOS-gated device. The switching di/dt can be measured by measuring the voltage difference across the length of a calibrated wire bond having a predetermined length and diameter.

Claims

1. A control circuit for controlling the switching di/dt and switching dv/dt of a MOS gate controlled power device, said MOS gate controlled device providing a supply voltage to a load circuit;

said control circuit comprising;

a current generator circuit having an output coupled to a gate terminal of said MOS gate controlled device for supplying a current to said gate terminal;

a first resistor having a first resistance and being coupled to a source terminal of said MOS gate controlled device;

a second resistor having a second resistance and coupled to said source terminal; and

a switching circuit for coupling a common terminal of said current generator circuit to a respective one of said first and second resistors for controlling the switching dv/dt and for coupling said common terminal to another of said first and second resistors for controlling the switching di/dt.

2. The circuit of claim 1, wherein said first resistance is chosen to provide di/dt control when said current generator circuit is coupled to said first resistor.

3. The circuit of claim 1, wherein that second resistance is chosen to provide dv/dt control when said current generator circuit is coupled to said second resistor.

4. The integrated circuit of claim 1, wherein said control circuit further includes a negative dv/dt detection circuit coupled to said switching circuit.

5. The circuit of claim 4, wherein said negative dv/dt detector circuit includes a capacitor.

6. The circuit of claim 4, wherein said negative dv/dt detector circuit includes a resistor.

7. The integrated circuit of claim 1, further including a di/dt measurement circuit coupled to said switching circuit.

8. The circuit of claim 7, wherein said di/dt measurement circuit includes a calibrated wire bond having a predetermined length and diameter.

9. The circuit of claim 1, further comprising a clamp circuit coupled between said gate terminal and a source terminal of said MOS gate controlled device.

10. The circuit of claim 9, wherein when said MOS gate controlled device is initially turned on, said clamp circuit is activated to provide a low impedance connection between said gate and source terminals of said MOS gate controlled device.

11. The circuit of claim 10, further comprising a clamp control circuit for controlling said clamp circuit as a function of an applied gate signal.

12. The circuit of claim 11, wherein said clamp control circuit includes a flip-flop circuit.

13. The circuit of claim 1, further comprising a switching circuit for controlling the coupling of said common terminal of said current generator circuit to said one of said resistors as a function of a detected negative dv/dt.

14. The circuit of claim 13, wherein said switching circuit includes at least one flip-flop circuit.

15. A method of controlling the switching di/dt and switching dv/dt of a MOS gate controlled device;

said MOS gate controlled device controlling a supply voltage to a circuit;

said method comprising the steps of;

providing a current generator circuit for supplying a current to a gate of said MOS gate controlled power device;

coupling a common terminal of said current generator circuit to a first resistor which is coupled to a source terminal of said MOS device for supplying a first current to said gate of said MOS gate controlled device and thereby controlling the switching dv/dt of said circuit;

decoupling said current generator circuit from said first resistor and coupling said current generator circuit to a second resistor for supplying a second current to said gate and thereby controlling the switching di/dt of said circuit; and

terminating the supply of said second current when said gate voltage reaches a predetermined value.

16. The method of claim 15, further comprising the step of detecting a negative value of the dv/dt prior to disconnecting said current generator from said first resistor.

17. The method of claim 15, further comprising the step of releasing a clamping circuit prior to coupling said current generator to said first resistor.

18. A method of controlling the switching di/dt and dv/dt of a MOS gate controlled device;

said MOS gate controlled device controlling a supply voltage to a load circuit;

said method comprising the steps of;

discharging a gate terminal of said MOS gate controlled device by coupling a common terminal of a current generator circuit to a first resistor which is coupled to a source terminal of said MOS gate controlled device and thereby controlling the rate of discharge;

decoupling said current generator circuit from said first resistor and coupling said current generator to a second resistor and thereby controlling said switching di/dt of said circuit; and

clamping said gate terminal when the voltage at said gate terminal is below a predetermined value.

19. The method of claim 18, further comprising the step of measuring the value of the switching dv/dt prior to decoupling said current generator from said first resistor.

20. The method of claim 19, wherein said step of measuring the value of the dv/dt detects a negative value of the dv/dt.

21. A control circuit for controlling the switching di/dt and the switching dv/dt of a MOS gate controlled device formed in a substrate, said MOS gate controlled device providing a supply voltage to a load circuit;

said control circuit comprising;

a current generator circuit having an output coupled to a gate terminal of said MOS gate controlled device for supplying a current thereto;

a calibrated wire bond having a predetermined length and diameter and coupled to one of a source terminal and a drain terminal of said MOS gate controlled device; and

a feed back circuit for controlling the current supplied by said current generator circuit as a function of a value of the di/dt measured across said wire bond.

22. The method of claim 21 wherein the di/dt is measured by determining the voltage difference across the length of said calibrated wire bond.