Complimentary double pumping voltage boost converter

• US 6,127,875 A
• Filed: 08/13/1998
• Issued: 10/03/2000
• Est. Priority Date: 08/13/1998
• Status: Expired due to Term

• Current Assignee: North Star Innovations Inc. (Wi-LAN Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Allen, Steven Peter, Atriss, Ahmad H., Walcott, Gerald Lee, Seelbach, Walter C.
• Primary Examiner(s): Lam, Tuan T.
• Assistant Examiner(s): Nguyen, Hiep
• Application Number:
  US09/130,343
• Time in Patent Office: 782 Days
• Field of Search: 327/534, 327/536, 327/530, 327/537, 327/390, 327/306, 327/331, 327/589, 365/185.23
• US Class Current: 327/306
• CPC Class Codes: H02M 3/073 Charge pumps of the Schenkel-type

Abstract

A voltage boosting circuit which derives an output voltage than is substantially twice the magnitude of a supply voltage applied thereto. The voltage boosting circuit consists of complementary acting boost circuits each having a pair of switches (42A, 52A; 42B, 52B) connected between an input of the voltage boosting circuit, at which is applied the supply voltage, and an output at which the output voltage is produced. Boost capacitors (48A, 48B) are connected between the respective switches of the complementary boost circuits and the switches of the these circuits are opened and closed out of phase with respect to each other in response to clocking signals being applied thereto such that a boosted output voltage is produced during each half cycle of the clocking signals.

Claims

1. A boost circuit having an input terminal and an output terminal, comprising:

a first switch coupled between the input terminal and the output terminal and operated by a first phase signal;

a second switch coupled between the input terminal and the output terminal and operated by a second phase signal that is opposite to the first phase signal;

a first capacitor having a first terminal coupled to the output terminal and a second terminal coupled for receiving a boost signal; and

a second capacitor having a first terminal coupled to the output terminal and a second terminal coupled for receiving the boost signal.

2. The boost circuit of claim 1, further including:

an inverting buffer having an input coupled for receiving the boost signal and an output coupled to the second terminal of the first capacitor; and

a non-inverting buffer having an input coupled for receiving the boost signal and an output coupled to the second terminal of the second capacitor.

3. The boost circuit of claim 1, further including:

a third switch coupled between the first terminal of the first capacitor and the output terminal, and operated by the second phase signal; and

a fourth switch coupled between the first terminal of the second capacitor and the output terminal, and operated by the first phase signal.