High speed lead inspection system

• US 6,128,034 A
• Filed: 02/18/1994
• Issued: 10/03/2000
• Est. Priority Date: 02/18/1994
• Status: Expired due to Term

• Current Assignee: ASTI Holdings Limited
• Original Assignee: Semiconductor Technologies & Instruments Incorporated (Onto Innovation Inc.)
• Inventors: Zemek, Michael C., Harris, Charles K.
• Primary Examiner(s): LEE, RICHARD J
• Application Number:
  US08/200,616
• Time in Patent Office: 2,419 Days
• Field of Search: 348/86, 348/87, 348/92, 348/94, 348/95, 348/125, 348/126, 348/131, 348/127, 340/653, 250/561, 250/343
• US Class Current: 348/87
• CPC Class Codes: H05K 13/0813 Controlling of single components prior to mounting, e.g. orientation, component geometry H05K13/0812 takes precedence
• CPC Class Codes: H05K 13/0818 Setup of monitoring devices prior to starting mounting operations; Teaching of monitoring devices for specific products; Compensation of drifts during operation, e.g. due to temperature shifts

Abstract

An inspection system determines if leads of a semiconductor device are in proper positions. Images from at least two sides of the semiconductor device are captured along with calibration marks formed in the side of a track upon which the semiconductor device is mounted. All leads and calibration marks are captured in a single video image, the images from one side of the semiconductor device being off set from the image from the other side.

Claims

1. A lead inspection system utilizing image capture to determine defects in lead placement, comprising:

a track for holding a semiconductor device to be inspected;

means for viewing a first side of said track and leads of said semiconductor device under inspection to form a first image and a second side of said track and leads of said semiconductor device under said inspection to form a second image;

an optical system for combining said first image and said second image of said first side and said second side into one video display; and

calibration marks on said first side and said second side of said track adjacent the leads of said semiconductor device for providing calibration information with the leads to determine a position of the leads.

2. The system according to claim 1, wherein said track has sloping sides, sloping inward from top to bottom.

3. The system according to claim 1, wherein said calibration marks are formed in track sides of said track.

4. The system according to claim 1, wherein said track has a top side, and said top side has a groove therein along which said semiconductor device is moved for inspection.

5. The inspection system according to claim 1, including illumination sources for said first side and said second side of said track.

6. The system according to claim 1, wherein said leads are back lighted by illumination sources and said first side and said second side of said track.

7. The system according to claim 1, wherein said means for viewing said first side and said second side of said track, includes optical mirrors reflecting images from said first side and said second side of said track into an optical prism which directs the image of each side of said track into a video camera.

8. A lead inspection system utilizing image capture to determine defects in lead placement, comprising:

a track, having two opposite sides, for holding a semiconductor device to be inspected with leads of said semiconductor device extending downward from said two opposite sides;

calibration marks on a first side and a second side of said track adjacent the leads of said semiconductor device for providing calibration information with the leads to determine a position of the leads; and

optical means for combining a first image of said first side and a second image of said second side of the leads of said two opposite sides of said semiconductor device mounted on said track, with said calibration marks to form a common video display.

9. The system according to claim 8, wherein said track has sloping sides, sloping inward from top to bottom.

10. The system according to claim 8, wherein said calibration marks are included in track sides of said track.

11. The system according to claim 8, wherein said track has a top side and said top side has a groove therein along which said semiconductor device is moved for inspection.

12. The inspection system according to claim 8, including illumination sources for two track sides of said track.

13. The system according to claim 8, wherein said leads are back lighted by illumination sources and two track sides of said track.

14. The system according to claim 8, wherein said optical means for combining said first image and said second image, includes optical mirrors reflecting images from said two track sides of said track into an optical prism which directs the image of each side of said track into a video camera.

15. A method for inspecting leads of a semiconductor device in a single video image, comprising the steps of:

mounting a semiconductor device on a track, having calibration marks formed on two track sides of the track, with the leads extending down the sides of the track adjacent the calibration marks;

illuminating the track to provide back lighting of the leads being inspected, and contrast between the calibration marks and track sides; and

capturing the leads and calibration marks with at least two images in a common video image.

16. The method according to claim 15, wherein said step of capturing includes combining at least two images of the leads and calibration marks from at least two sides of the semiconductor device and said track into a common image.

17. The method according to claim 15, wherein said at least two images of the leads of said semiconductor device from two sides of said track are offset one from the other in the common video image.