Signal converting receiver having constant hysteresis, and method therefor
First Claim
1. An apparatus for converting a differential input signal having a first component and a second component to a single output signal, said output signal having the same binary information as said input signal, said apparatus comprising:
- a first pair of transistors providing a first differential current;
a second pair of transistors providing a second differential current;
a combiner for providing a single intermediate signal which is related to the difference between said first and second differential currents;
a signal distributor for forwarding said differential input signal to said first pair of transistors when an average magnitude of said first and second components is in a first magnitude range, and for forwarding said differential signal to said second pair of transistors when said average magnitude is in a second, different magnitude range, andan output trigger for receiving said single intermediate signal to provide said output signal.
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Abstract
A LVDS receiver (200) converts a differential input signal (15) at an input (201/202, e.g., voltage difference V1 -V2) to a single output signal (20) at an output (295). The receiver (200) has a signal distributor (205), first and second transistor pairs (220,210), a combiner (260), and an output trigger (250). The distributor (205) either forwards the differential input signal (15) to the first transistor pair (220) when the common mode portion of the input signal (15, e.g., VCM =(V1 +V2)/2) of the first and second input signal components is in a first magnitude range (e.g., VCM >VREF) or to the second transistor pair (210) when the common mode portion is in a second, different magnitude range (e.g., VCM <VREF). The transistors of both pairs (210 and 220) are of the same conductivity type. This approach provides substantially constant input transconductances (gm) over the whole common mode input signal range.
71 Citations
19 Claims
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1. An apparatus for converting a differential input signal having a first component and a second component to a single output signal, said output signal having the same binary information as said input signal, said apparatus comprising:
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a first pair of transistors providing a first differential current; a second pair of transistors providing a second differential current; a combiner for providing a single intermediate signal which is related to the difference between said first and second differential currents; a signal distributor for forwarding said differential input signal to said first pair of transistors when an average magnitude of said first and second components is in a first magnitude range, and for forwarding said differential signal to said second pair of transistors when said average magnitude is in a second, different magnitude range, and an output trigger for receiving said single intermediate signal to provide said output signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method for converting a differential input signal having a first component and a second component to a single output signal, wherein said output signal has the same binary information as said input signal, said method comprising the step of:
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receiving said input signal; depending on a relation between an average magnitude of said first and second components to a reference magnitude, selectively forwarding said input signal to either a first transistor pair or said second transistor pair; providing a first differential current by said first transistor pair and a second differential current by a second transistor pair; relating the difference between said first and second differential currents to a single intermediate signal; and triggering said intermediate signal to said output signal. - View Dependent Claims (14, 15)
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16. A low-voltage differential signal (LVDS) receiver for converting a differential input signal represented by a voltage difference to a single output signal, said receiver comprising:
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first and second transistor pairs for providing first and second intermediate differential current signals; a signal distributor for either forwarding the differential input signal to the first transistor pair when the common mode voltage of the input signal is in a first magnitude relation to a reference voltage or otherwise forwarding the differential input signal to the second transistor pair; an arrangement for deriving an intermediate single current signal from said first and second intermediate differential current signals; and an output trigger for transferring said intermediate differential current signal to said output signal. - View Dependent Claims (17, 18, 19)
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Specification