Power reception circuits for a device receiving an AC power signal

• US 6,134,130 A
• Filed: 07/19/1999
• Issued: 10/17/2000
• Est. Priority Date: 07/19/1999
• Status: Expired due to Fees

• Current Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Lemersal, Donald Bernard Jr., Collins, Timothy James, Connell, Lawrence Edwin, Rakers, Patrick Lee
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): Vu, Bao Q.
• Application Number:
  US09/356,427
• Time in Patent Office: 456 Days
• Field of Search: 363/69, 363/70, 363/84, 363/81, 363/89, 363/125, 363/127
• US Class Current: 363/89
• CPC Class Codes: G06K 19/0701 at least one of the integrated circuit chips comprising an arrangement for power management
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: H02J 50/12 of the resonant type
• CPC Class Codes: H02M 1/4283 by adding a controlled rectifier in parallel to a first rectifier feeding a smoothing capacitor
• CPC Class Codes: H02M 7/217 using semiconductor devices only
• CPC Class Codes: H04B 5/77 for interrogation
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

Power reception circuits employable in portable data devices (e.g., smart cards) to derive power and/or data from an input AC power signal (e.g., an ASK modulated carrier signal). In one embodiment, the power reception circuit comprises a power rectifier (120), a shunt rectifier (142) and a shunting element (132). The power rectifier (120) is adapted to rectify the input power signal, yielding a rectified output waveform. The shunt rectifier (142) is connected in parallel with the power rectifier (120). The shunting element (132) is connected to the shunt rectifier (142) and is operable to regulate an output voltage or current waveform produced at the output of the power rectifier (120). In another embodiment, the power reception circuit includes an analog circuit (610) for recovering data from a modulated carrier signal. A decoupling device (630) isolates the analog circuit (610) from impedance variations of a load. A shunt device (640) diverts undesired current from the load.

Claims

1. A power reception circuit comprising:

a power rectifier operably coupled to an AC input power signal and including a first pair of output terminals, the power rectifier rectifying the input power signal, yielding a rectified output waveform across the first pair of output terminals;

a shunt rectifier connected in parallel with the power rectifier and including a second pair of output terminals; and

a shunting element connected across the second pair of output terminals.

2. The circuit of claim 1 wherein the shunting element is operable to regulate the output waveform across the first pair of output terminals.

3. The circuit of claim 2 further comprising a shunt control circuit operable in combination with the shunting element to dissipate undesired current in the power reception circuit.

4. The circuit of claim 1 further comprising a bypass capacitor connected across the first and second output terminals.

5. The circuit of claim 1 wherein the shunting element is a transistor.

6. The circuit of claim 5 wherein the shunting element is a FET.

7. The circuit of claim 1 implemented in a portable data device.

8. The circuit of claim 7 wherein the AC input power signal comprises a carrier signal inductively coupled to the portable data device.

9. The circuit of claim 1 wherein the AC input power signal is a modulated carrier signal, the circuit having a highpass characteristic for passing substantially a desired data portion of the modulated carrier signal.

10. The circuit of claim 9 wherein the highpass characteristic is adapted to remove low frequency modulation distortions from the modulated carrier signal.

11. The circuit of claim 10 being adapted to remove frequencies less than about 1 kHz from the modulated carrier signal.

12. A power reception circuit comprising:

a first and second shunting element each having an input terminal operably coupled to an input power node;

the first shunting element having an output terminal operably coupled to a load and being adapted to isolate the input power node from impedance variations of the load, the second shunting element being adapted to divert undesired current from the load.

13. The circuit of claim 12 wherein the load is voltage regulated.

14. The circuit of claim 12 wherein the input power node supplies a modulated carrier signal, the circuit having a highpass characteristic for passing substantially a desired data portion of the modulated carrier signal.

15. The circuit of claim 14 wherein the highpass characteristic is adapted to remove low frequency modulation distortions from the modulated carrier signal.

16. The circuit of claim 15 being adapted to remove frequencies less than about 1 kHz from the modulated carrier signal.

17. The circuit of claim 12 including a first rectifier connected between the input power node and the first shunting element.

18. The circuit of claim 17 including a second rectifier connected between the input power node and the second shunting element.

19. The circuit of claim 12 implemented in a portable data device.

20. A portable data device comprising:

an antenna element for receiving a modulated carrier signal at an input power node;

an analog circuit for deriving data from the modulated carrier signal; and

a power reception circuit for deriving power from the modulated carrier signal, the power reception circuit including first and second shunting elements operable in combination to regulate a voltage level appearing at the input power node, the first shunting element regulating to a first voltage level and the second shunting element regulating to a second voltage level.

21. The circuit of claim 20 wherein the first voltage level is lower than the second voltage level.