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Configurable memory block

  • US 6,134,181 A
  • Filed: 02/24/1999
  • Issued: 10/17/2000
  • Est. Priority Date: 02/24/1999
  • Status: Expired due to Term
First Claim
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1. A circuit comprising:

  • a memory comprising a plurality of storage elements each configured to store data in response to one of a plurality of internal address signals;

    a plurality of address circuits each configured to generate one of said plurality of internal address signals in response to (i) an external address signal, (ii) a clock signal and (iii) a control signal; and

    an output circuit configured to present an output having a variable word-width in response to said control signal.

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