Inverse multiplexing within asynchronous transfer mode communication networks

• US 6,134,246 A
• Filed: 01/26/1998
• Issued: 10/17/2000
• Est. Priority Date: 01/26/1998
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Cai, Biaodong, Samudra, Pradeep Dinkar
• Primary Examiner(s): Vu, Huy D.
• Assistant Examiner(s): PHAN, MAN U
• Application Number:
  US09/013,380
• Time in Patent Office: 995 Days
• Field of Search: 370/474, 370/395, 370/535, 370/389, 370/394, 370/536, 370/471, 370/408, 370/476, 370/477, 370/465, 370/466, 370/505, 370/516, 395/200.6
• US Class Current: 370/474
• CPC Class Codes: H04L 2012/5652 Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
• CPC Class Codes: H04L 2012/5672 Multiplexing, e.g. coding, scrambling
• CPC Class Codes: H04Q 11/0478 Provisions for broadband connections

Abstract

Software inverse multiplexing within an Asynchronous Transfer Mode (ATM) communication network is provided by a first ATM switch receiving a stream of ATM cells over a high bandwidth communication link. A Segmentation and Re-assembly (SAR) module associated with the first ATM switch thereafter reassembles the received ATM cells into corresponding user packets. Control data identifying the sequence of assembled user packets are added to each user packet and de-assembled into corresponding ATM cells. The de-assembled ATM cells are then communicated over a plurality of low bandwidth communication links to a second ATM switch. The second ATM switch receives the transmitted ATM cells over said low bandwidth communications links. A SAR module associated with the second ATM switch thereafter reassembles the received ATM cells into corresponding user packets. Utilizing the enclosed control data, received user packets are re-synchronized into their original sequence. The control data are then removed and the user packets are de-assembled back into corresponding ATM cells. The de-assembled ATM cells are then communicated over an outgoing high bandwidth communication link.

Claims

1. An asynchronous transfer mode (ATM) communication network, comprising:

a first communication link;

a plurality of second communication links;

a first ATM switch connected to said first communication link for receiving a stream of ATM cells;

a first application module associated with said first ATM switch for;

associating said stream of ATM cells into a plurality of sub-streams wherein all of said ATM cells associated with a particular sub-stream are associated with a particular user packet; and

transmitting said plurality of sub-streams over said plurality of second communications links wherein all ATM cells associated with particular one of said plurality of sub-streams are transmitted over particular one of said second communications link;

a second ATM switch connected to said plurality of second communication links for receiving said plurality of sub-streams; and

a second application module associated with said second ATM switch for re-assembling said plurality sub-streams into said stream of ATM cells.

2. The ATM communication network of claim 1 wherein said first ATM switch further comprises a first segmentation and re-assembly (SAR) module for assembling particular ones of said received ATM cells into a user packet.

3. The ATM communication network of claim 2 wherein said first ATM switch further comprises a central processing unit (CPU) for receiving said user packet assembled by said first SAR module, adding control data to said assembled user packet to generate a modified user packet, and instructing said first SAR to transmit said modified user packet over a particular one of said plurality of second communication links.

4. The ATM communication network of claim 3 wherein said control data comprises a sequence number identifying the order of said modified user packet in relation to the rest of the user packets within said stream of ATM cells.

5. The ATM communication network of claim 3 wherein said control data comprises a session number identifying a virtual connection between said first ATM switch and said second ATM switch.

6. The ATM communication network of claim 3 wherein said CPU transmits a plurality of modified user packets with a particular data value to synchronize a communication link between said first ATM switch and said second ATM switch.

7. The ATM communication network of claim 3 wherein said first SAR segments said modified user packet into a plurality of ATM cells and transmits said plurality of ATM cells over said particular one of said plurality of second communication links.

8. The ATM communication network of claim 7 wherein said second ATM switch further comprises:

a plurality of memory registers;

a circular buffer for storing a plurality of memory addresses, each of said memory addresses pointing to particular one of said plurality of memory registers; and

a second SAR for re-essembling said plurality of ATM cells received over said particular one of said plurality of second communication links into said modified user packet and storing said modified user packet within one of said plurality of memory registers.

9. The ATM communication network of claim 3 wherein said CPU further comprises a plurality of registers, each of said registers storing data representing the traffic level associated with particular one of said plurality of second communication links.

10. The ATM communication network of claim 9 wherein said CPU selects a particular one of said plurality of second communication links to transmit said modified packet by evaluating said plurality of registers.

11. The ATM communication network of claim 2 wherein said first ATM switch further comprises a routing table (RT) for forwarding said stream of received ATM cells to said first SAR.

12. An asynchronous transfer mode (ATM) communication switch connected to a first communication link for receiving a plurality of ATM cells and to a plurality of second communication links for transmitting said plurality of ATM cells, said ATM communication switch comprising:

a switching component for receiving said plurality of ATM cells over said first communication link;

a segmentation and re-assembly (SAR) module for assembling said plurality of ATM cells into a plurality of user packets;

a central processing unit (CPU) for associating particular one of said plurality of user packets with particular one of said plurality of second communication links; and

wherein said SAR module further segments said particular one of said plurality of user packets into a plurality of second ATM cells and transmits all of said plurality of second ATM cells over said particular second communication link.

13. The ATM communication switch of claim 12 wherein said CPU is associated with a plurality of registers, each of said plurality of registers storing data representing traffic level associated with particular one of said plurality of second communication links.

14. The ATM communication switch of claim 12 wherein said CPU adds control data to each of said plurality of user packets, said control data within each user packet representing the position of said user packet with respect to the rest of said plurality of user packets.

15. The ATM communication switch of claim 12 further connected to a receiver ATM communication switch, and wherein said CPU transmits a control message over particular one of said plurality of second communication links to initiate a virtual connection with said receiver ATM communication switch.

16. An asynchronous transfer mode (ATM) communication switch connected to a plurality of communication link for receiving a plurality of ATM cells and to a second communication link for transmitting said plurality of ATM cells, said ATM communication switch comprising:

a switching component for receiving said plurality of ATM cells over said first communication links;

a segmentation and re-assembly (SAR) module for assembling said plurality of ATM cells into a plurality of user packets wherein all of said ATM cells assembled into particular one of said user packets are received over particular one of said plurality of first communication links;

a central processing unit (CPU) for associating with said SAR module for synchronizing said received plurality of user packets; and

wherein said SAR module further de-assembles each of said plurality of user packets into a stream of ATM cells and transmits stream of ATM cells over said second communication link.

17. The ATM communication switch of claim 16 wherein said plurality of user packets comprise a ATM Adaptation Layer 5 (AAL5) packet.

18. The ATM communication switch of claim 16 wherein said CPU further comprises a circular buffer for storing and synchronizing said plurality of user packets assembled by said SAR module.

19. The ATM communication switch of claim 16 wherein each of said plurality of user packets includes control data for synchronizing said user packet with the rest of said plurality of user packets, said CPU removing said control data stored within each of said user packets assembled by said SAR module.

20. The ATM communication switch of claim 19 wherein said control data comprises a sequence number for synchronizing each of said user packets with the rest of said plurality of user packets.

21. A method for routing a stream of asynchronous transfer mode (ATM) cells received over a high bandwidth communication link over a plurality of low bandwidth communication links, said method comprising the steps of:

receiving a stream of ATM cells over said high bandwidth communication link;

assembling said stream of ATM cells into a plurality of user packets, each of said user packets comprising one or more of said received ATM cells;

adding control data to each of said plurality of user packets to generate a plurality of modified user packets, said control data representing the position of said each user packet with respect to the rest of said plurality of user packets;

de-assembling each of said plurality of modified user packets into a second stream of ATM cells; and

routing said second stream of ATM cells over particular one of said plurality of high bandwidth communication links.

22. The method of claim 21 wherein said steps of assembling and de-assembling are performed by a segmentation and re-assembly (SAR) module associated with an ATM communication switch connected to said high bandwidth communication link and to said plurality of low bandwidth communication links.

23. The method of claim 21 wherein said step of adding said control data to said each of said plurality of user packets comprises the step of adding a sequence number associated with each of said user packets.

24. The method of claim 21 wherein said step of routing said associated stream of ATM cells over said plurality of high bandwidth communication links further comprises the step of routing all of the ATM cells belonging to a particular modified user packet over a particular one of said plurality of high bandwidth communication link.