Method and apparatus for achieving higher frequencies of exactly rounded results
First Claim
1. A method for increasing the frequency of exactly rounded results when performing an iterative calculation in a microprocessor comprising:
- receiving an operand;
determining an initial estimate of the result of said iterative calculation using said operand;
multiplying said initial estimate and said operand to generate an intermediate result;
repeating said multiplying a predetermined number of times, wherein said intermediate result is used in place of said initial estimate, wherein the final repetition generates a final result; and
adding an adjustment constant to said final result, wherein said adjustment constant increases the probability that said final result will equal the exactly rounded result of said iterative calculation.
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Abstract
A multiplier configured to obtain higher frequencies of exactly rounded results by adding an adjustment constant to intermediate products generated during iterative multiplication operations is disclosed. One such iterative multiplication operation is the Newton-Raphson iteration, which may be utilized by the multiplier to perform reciprocal calculations and reciprocal square root calculations. For each iteration, the results converge toward an infinitely precise result. To improve the frequency of the exactly rounded result, the results of the iterative calculations may be studied for a large number of differing input operands to determine the best suited value for the adjustment constant. The multiplier may also be configured to perform scalar and packed vector multiplication using the same hardware.
81 Citations
20 Claims
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1. A method for increasing the frequency of exactly rounded results when performing an iterative calculation in a microprocessor comprising:
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receiving an operand; determining an initial estimate of the result of said iterative calculation using said operand; multiplying said initial estimate and said operand to generate an intermediate result; repeating said multiplying a predetermined number of times, wherein said intermediate result is used in place of said initial estimate, wherein the final repetition generates a final result; and adding an adjustment constant to said final result, wherein said adjustment constant increases the probability that said final result will equal the exactly rounded result of said iterative calculation. - View Dependent Claims (2, 3, 4, 5)
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6. A method for increasing the probability of exactly rounded results when using a multiplier to evaluate a constant power of an operand comprising:
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determining an initial estimate of the operand raised to a first constant power; performing an iteration comprising; multiplying the operand and the initial estimate in the multiplier to form a product; adding an adjustment constant to said product; calculating an intermediate approximation by inverting one or more bits from said product; rounding said intermediate approximation; normalizing said intermediate approximation; and repeating said iteration, wherein said intermediate approximation is used in place of said initial estimate. - View Dependent Claims (7, 8, 9, 10)
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11. An execution unit configured to evaluate a constant power of an operand comprising:
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an initial estimate generator configured to receive an operand and output an initial estimate of said operand raised to a particular constant power; and a multiplier coupled to receive said operand and said initial estimate, wherein said multiplier is configured to calculate a product of said initial estimate and said operand, wherein said multiplier is further configured to conditionally add an adjustment constant to said product to form an adjusted product, wherein said multiplier is further configured to round and normalize said adjusted product, wherein said adjustment constant is selected to increase the probability that said adjusted product equals an exactly rounded product. - View Dependent Claims (12, 13, 14)
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15. A multiplier comprising:
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a partial product generator coupled to receive a multiplicand input and configured to generate one or more partial products based upon said multiplicand operand; selection logic coupled to said partial product generator and configured to receive a multiplier operand, wherein said selection logic is configured to select a plurality of partial products based upon said multiplier operand; and a partial product array adder coupled to said selection logic, wherein said adder is configured to receive and sum a number of said partial products and an adjustment constant to form a product, wherein said adjustment constant is selected to increase the frequency that said product is exactly rounded. - View Dependent Claims (16, 17, 18, 19)
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20. A microprocessor comprising:
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an instruction cache; a load/store unit coupled to said instruction cache; and an execution unit coupled to receive and execute instructions from said instruction cache, wherein said execution unit is configured to evaluate a constant power of an operand, wherein said execution unit comprises; an initial estimate generator configured to receive an operand and output an initial estimate of said operand raised to a particular constant power; and a multiplier coupled to receive said operand and said initial estimate, wherein said multiplier is configured to calculate a product of said initial estimate and said operand, wherein said multiplier is further configured to conditionally add an adjustment constant to said product to form an adjusted product, wherein said multiplier is further configured to round and normalize said adjusted product, wherein said adjustment constant is selected to increase the probability that said adjusted product equals an exactly rounded product.
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Specification