Non-volatile memory with embedded programmable controller

• US 6,134,631 A
• Filed: 10/31/1996
• Issued: 10/17/2000
• Est. Priority Date: 08/19/1996
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Hyundai Electronics America Incorporated (SK Hynix Inc.)
• Inventors: Jennings, Earle W. III
• Primary Examiner(s): Gregory, Bernarr E.
• Application Number:
  US08/739,394
• Time in Patent Office: 1,447 Days
• Field of Search: 380/4, 380/9, 380/49, 380/50, 380/59, 395/200.6, 395/200.67, 395/651, 395/652, 395/653, 395/712, 455/403, 455/418, 455/422, 455/466, 348/207, 348/216, 348/231, 348/234, 348/266, 348/272, 348/273, 348/282, 348/294, 348/311, 348/265, 348/274, 711/101, 711/111-113, 711/117-119, 711/122, 711/123, 711/133, 711/136, 711/141, 711/143, 711/150, 711/154, 711/158, 711/170, 711/173
• US Class Current: 711/117
• CPC Class Codes: H04N 19/42 characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation H04N19/635 takes precedence
• CPC Class Codes: H04N 19/423 characterised by memory arrangements H04N19/433 takes precedence
• CPC Class Codes: H04N 19/61 in combination with predictive coding

Abstract

Computer systems may be provided with additional performance for demanding applications while adding little additional hardware. For example, a slave device for a host computer system combines an embedded programmable controller with non-volatile memory, local RAM, and interface logic. The host computer system treats the slave device as if it would be a hierarchical memory system such as a conventional disk drive on which it may store and retrieve files. Additionally, the host computer system may program the controller to perform operations on stored information, including image processing and/or data compression. The non-volatile memory may include a disk drive, writable CD-ROM, optical drive, or non-volatile solid state memory.

Claims

1. Apparatus for providing non-volatile data storage and additional processing to a host computer system, said apparatus comprising:

a non-volatile memory system including at least one non-volatile memory device, said non-volatile memory system responding to hierarchical memory structure control commands received from said host computer system by storing and retrieving information from said host computer system; and

a programmable controller, said programmable controller receiving a first control program from said host computer system, and responding to a first command from said host computer system to invoke said first control program, said first control program operating on said information stored in said non-volatile memory system, wherein said non-volatile memory system and said programmable controller together implement a hierarchical memory structure.

2. The apparatus of claim 1 further comprising a RAM device for storing intermediate results of said first control program.

3. The apparatus of claim 1 wherein said non-volatile memory system stores said first control program.

4. The apparatus of claim 1 further comprising a host interface that couples said non-volatile memory system and said programmable controller to said host computer system.

5. The apparatus of claim 1 further comprising a ROM device for storing a non-modifiable second control program of said programmable controller.

6. The apparatus of claim 1 further comprising an error correction coding system coupled to said non-volatile memory system that applies an error correcting code to information stored in said non-volatile memory system and that removes said error correcting code from information retrieved from said non-volatile memory system, whereby errors are detected and corrected.

7. The apparatus of claim 6 wherein said error correction coding system is programmable from said host computer system.

8. The apparatus of claim 1 further comprising a digital signal processor operating in conjunction with said programmable controller.

9. The apparatus of claim 8 wherein said digital signal processor is programmable from said host computer system.

10. The apparatus of claim 1 further comprising a programmable component independent of said programmable controller and operating in conjunction with said programmable controller.

11. The apparatus of claim 10 wherein said programmable component is optimized for performing bit packing and unpacking to support compression and decompression.

12. The apparatus of claim 10 wherein said programmable component supports encryption and decryption.

13. The apparatus of claim 1 further comprising an additional interface component for exchanging information with a system external to said apparatus.

14. A plurality of apparatus as in claim 13 interconnected for data processing under control of said host computer system.

15. The apparatus of claim 1 further comprising a content addressable memory component accessible to said programmable controller.

16. The apparatus of claim 1 wherein said non-volatile memory system comprises a hard disk drive.

17. The apparatus of claim 1 wherein said non-volatile memory system comprises a non-volatile solid state memory device.

18. The apparatus of claim 1 wherein said non-volatile memory system comprises an optical disk drive.

19. The apparatus of claim 1 wherein said non-volatile memory system comprises a writable CD-ROM.

20. The apparatus of claim 1 wherein said programmable controller performs encryption using a key stored in said non-volatile memory system.

21. The apparatus of claim 1 wherein said programmable controller performs password verification using a key stored in said non-volatile memory system.

22. The apparatus of claim 1 wherein said programmable controller performs decryption using a key stored in said non-volatile memory system.

23. The apparatus of claim 1 wherein certain information stored in said non-volatile memory system is inaccessible to said host computer system.

24. The apparatus of claim 23 wherein said certain information comprises a key for one of password verification, encryption, and decryption.

25. The apparatus of claim 1 wherein said host computer issues a second command to said programmable controller to receive data to be part of said first control program.

26. The apparatus of claim 25 wherein said host computer issues a third command to start reception of data for said first control program.

27. The apparatus of claim 1 further comprising:

a supplemental memory system physically integrated with said programmable controller and non-volatile memory system and accessible as a part of system memory to said host computer system.

28. The apparatus of claim 27 wherein said supplemental memory system comprises non-volatile memory.

29. The apparatus of claim 28 further comprising error control coding circuitry to apply error coding to data stored in said memory system accessible as a part of system memory.

30. The apparatus of claim 28 further comprising:

a cache interposed between said memory system and said host computer system optimizing memory access performance of said host computer system.

31. Apparatus for non-volatile data storage and high-speed data processing in a host computer system, said apparatus comprising:

a plurality of units, each said unit comprising;

a non-volatile memory system including at least one non-volatile memory device, said non-volatile memory system responding to hierarchical memory structure control commands by storing and retrieving information;

a programmable controller, said programmable controller operating an externally configurable control program, and responding to a command from said host computer system to invoke said control program, said control program operating on said information stored in said non-volatile memory system, wherein said programmable controller and said non-volatile memory system together implement a hierarchical memory structure; and

an interface system for exchanging information with others of said plurality of units; and

wherein

said plurality of units being programmable by said host computer system to operate concurrently on stored information.

32. The apparatus of claim 31 wherein each said unit further comprises a programmable component independent of said programmable controller and operating in conjunction with said programmable controller.

33. The apparatus of claim 32 wherein said programmable component is optimized for performing bit packing and unpacking to support compression and decompression.

34. The apparatus of claim 32 wherein said programmable component supports encryption.

35. The apparatus of claim 32 wherein said programmable component comprises a digital signal processing circuit.

36. The apparatus of claim 31 wherein each of said plurality of units further comprises a content-addressable memory.

37. A host computer system comprising:

a host CPU;

a host bus; and

apparatus for providing non-volatile data storage and additional processing to said host computer system, said apparatus comprising;

a non-volatile memory system including at least one non-volatile memory device, said non-volatile memory system and responding to hierarchical memory structure control commands received from said host computer system by storing and retrieving information from said host computer system; and

a programmable controller, said programmable controller operating a first control program received from said host computer system via said host bus, and responding to a command from said host CPU to invoke said first control program, said first control program operating on said information stored in said non-volatile memory system, wherein said non-volatile memory system and said programmable controller together implement a hierarchical memory system.

38. The host computer system of claim 37 wherein said host computer system is a personal digital assistant.

39. The host computer system of claim 37 wherein said non-volatile memory system stores a key for at least one of encrypting data, decrypting data, and password verification.

40. The wireless telephone unit of claim 37 wherein said key is inaccessible to said host bus.

41. A wireless telephone unit comprising:

an RF transceiver for transmitting and receiving data via a wireless network;

a microphone for capturing input audio signals;

a speaker for outputting audio responsive to an output audio signal;

wireless telephone control circuitry that receives said input audio signals and provides said output audio signals and provides a modulated output signal to said RF transceiver and receives a modulated input signal from said RF transceiver to implement telephone operation via said microphone and said speaker;

a non-volatile memory system including at least one non-volatile memory device, said non-volatile memory system responding to hierarchical memory structure control commands received from said wireless telephone control circuitry by storing and retrieving information from said wireless telephone control circuitry; and

a programmable controller, said programmable controller operating a first control program received from said wireless telephone control circuitry, and responding to a command from said wireless telephone control circuitry to invoke said first control program, said first control program operating on said information stored in said non-volatile memory system, wherein said non-volatile memory system and said programmable controller together implement a hierarchical memory system.

42. The wireless telephone unit of claim 41 wherein said non-volatile memory system stores a key for at least one of encrypting telephone number data, decrypting telephone number data, encrypting voice data, decrypting voice data, and password verification.

43. The wireless telephone unit of claim 42 wherein said key is inaccessible to said wireless telephone control circuitry.

44. A digital motion camera unit comprising:

a CCD array for capturing moving image data;

a camera control circuit that accepts said moving image data and relays said moving image data to a bus interface;

a storage system coupled to said camera control circuit via said bus interface and comprising a plurality of units, each said unit comprising;

a non-volatile memory system including at least one non-volatile memory device, said non-volatile memory system responding to hierarchical memory structure control commands by storing and retrieving information;

a programmable component, said programmable component operating an externally configurable control program, and responding to a command from said camera control circuit to invoke said control program, said control program operating on said information stored in said non-volatile memory system, wherein said programmable controller and said non-volatile memory system together implement a hierarchical memory structure; and

an interface system for exchanging information with others of said plurality of units; and

said plurality of units operating concurrently on stored information.

45. The digital motion camera unit of claim 44 wherein said storage system is removable.

46. The digital motion camera unit of claim 44 wherein said non-volatile memory stores said moving image data and said programmable component operates to compress said moving image data.

47. The digital motion camera unit of claim 46 wherein said programmable component operates to compress said moving image data in accordance with an MPEG compression scheme.

48. The digital motion camera unit of claim 46 wherein said programmable component comprises a programmable controller.

49. The digital motion camera unit of claim 46 wherein said programmable component comprises a digital signal processing circuit.