Package parallel test method and apparatus

• US 6,134,685 A
• Filed: 03/16/1998
• Issued: 10/17/2000
• Est. Priority Date: 03/16/1998
• Status: Expired due to Term

• Current Assignee: Advanced Micro Devices SDN Berhad (Advanced Micro Devices, Inc.)
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Spano, John D.
• Primary Examiner(s): Moise, Emmanuel L.
• Application Number:
  US09/039,816
• Time in Patent Office: 946 Days
• Field of Search: 714/725, 714/736, 714/724, 714/733, 714/738, 714/742, 324/73.1, 324/754, 324/762, 324/765, 637/8
• US Class Current: 714/724
• CPC Class Codes: G01R 31/2851 Testing of integrated circuits [IC] G01R31/317 takes precedence; testing individual devices G01R31/26; testing printed circuits G01R31/2801
• CPC Class Codes: G01R 31/2893 Handling, conveying or loading, e.g. belts, boats, vacuum fingers G01R31/2867 takes precedence; handling semiconductor devices or wafers during manufacture or treatment H01L21/67

Abstract

A method for partial parallel testing a plurality of integrated circuit packages using a multi-package tester head having a plurality of sockets. Each socket is used for testing an integrated circuit package. A first one of the sockets has a full complement of signal channels, and the other sockets have exclusive subsets of the full complement of signal channels. The first socket and the other sockets support parallel testing of the integrated circuit packages according to a first type of test. Only the first socket, with its full complement of signal channels, supports a second type of test. To test a plurality of integrated circuit packages, a group of packages are inserted in the sockets. A first-pass test is then performed, in parallel, on the packages in the sockets. Then, for packages that passed the first-pass test, second-pass testing is performed sequentially using the first socket.

Claims

1. A method for testing a plurality of integrated circuit packages using a multi-package tester head having a plurality of sockets, wherein a first one of the sockets has a predetermined number of signal channels and each of the other sockets has a plurality of signal channels that is a functional subset of the predetermined number of signal channels of the first socket, comprising the steps of:

inserting a plurality of packages in respective ones of the sockets;

performing a first-pass test in parallel on the packages present in the sockets;

performing a second-pass test on a package using the first socket; and

moving, successively, remaining ones of the packages to the first socket and repeating the step of performing the second-pass test for each of the packages.

2. The method of claim 1, wherein the second-pass test is only performed on packages passing the first-pass test.

3. The method of claim 1, wherein the first-pass test includes a sequential chain test.

4. The method of claim 3, wherein the first-pass test includes a built-in self-test.

5. The method of claim 4, wherein the second-pass test is a performance test.

6. The method of claim 1, wherein the first-pass test includes a built-in self-test.

7. The method of claim 6, wherein the second-pass test is a performance test.

8. The method of claim 1, wherein the second-pass test is a performance test.

9. A method for testing a plurality of integrated circuit packages using a multi-package tester head having a plurality of sockets, wherein a first one of the sockets has a predetermined number of signal channels and each of the other sockets has a plurality of signal channels that is a functional subset of the predetermined number of signal channels of the first socket, comprising the steps of:

inserting for a first time the packages in the plurality of sockets;

performing a first-pass test on a package using the first socket;

moving, successively, remaining ones of the packages to the first socket and repeating the step of performing the first-pass test for each of the packages;

inserting for a second time the packages in the plurality of sockets; and

performing a second-pass test in parallel on the packages present in the sockets.

10. The method of claim 9, wherein the second-pass test includes a sequential chain test.

11. The method of claim 10, wherein the second-pass test includes a built-in self-test.

12. The method of claim 11, wherein the first-pass test is a performance test.

13. The method of claim 12, wherein the first-pass test is a performance test.

14. The method of claim 9, wherein the first-pass test is a performance test.

15. An apparatus for testing a plurality of integrated circuit packages using a multi-package tester head having a plurality of sockets, wherein a first one of the sockets has a predetermined number of signal channels and each of the other sockets has a plurality of signal channels that is a functional subset of the predetermined number of signal channels of the first socket, comprising:

means for inserting a plurality of packages in respective ones of the sockets;

means for performing a first-pass test in parallel on the packages present in the sockets;

means for performing a second-pass test on a package using the first socket; and

means for moving, successively, remaining ones of the packages to the first socket and repeating the step of performing the second-pass test for each of the packages.

16. An apparatus for testing a plurality of integrated circuit packages using a multi-package tester head having a plurality of sockets, wherein a first one of the sockets has a predetermined number of signal channels and each of the other sockets has a plurality of signal channels that is a functional subset of the predetermined number of signal channels of the first socket, comprising:

means for inserting for a first time the packages in the plurality of sockets;

means for performing a first-pass test on a package using the first socket;

means for moving, successively, remaining ones of the packages to the first socket and repeating the step of performing the first-pass test for each of the packages;

means for inserting for a second time the packages in the plurality of sockets; and

means for performing a second-pass test in parallel on the packages present in the sockets.

17. An apparatus for testing a plurality of integrated circuit (IC) packages using a multi-package tester head having a plurality of sockets, wherein a first one of the sockets has a predetermined number of signal channels and each of the other sockets has a plurality of signal channels that is a functional subset of the predetermined number of signal channels of the first socket, comprising:

an IC package test arrangement including a package test controller and an automated package handler adapted to move IC packages in and out of ones of the sockets in response to commands from the package test controller, the IC package test arrangement being adapted to test the plurality of IC packages by

inserting a plurality of packages in respective ones of the sockets;

performing a first-pass test in parallel on the packages present in the sockets;

performing a second-pass test on a package using the first socket; and

moving, successively, remaining ones of the packages to the first socket and again performing the second-pass test for each of the packages.

18. The apparatus of claim 17, wherein the IC package test arrangement is further adapted to test the plurality of IC packages by including, in the first-pass test, at least one of a sequential chain test and a built-in self-test.

19. The apparatus of claim 17, wherein the IC package test arrangement is further adapted to test the plurality of IC packages by including, in the second-pass test, a performance test.

20. An apparatus for testing a plurality of integrated circuit (IC) packages using a multi-package tester head having a plurality of sockets, wherein a first one of the sockets has a predetermined number of signal channels and each of the other sockets has a plurality of signal channels that is a functional subset of the predetermined number of signal channels of the first socket, comprising:

an IC package test arrangement including a package test controller and an automated package handler adapted to move IC packages in and out of ones of the sockets in response to commands from the package test controller, the IC package test arrangement being adapted to test the plurality of IC packages by

inserting for a first time the packages in the plurality of sockets;

performing a first-pass test on a package using the first socket;

moving, successively, remaining ones of the packages to the first socket and again performing the first-pass test for each of the packages;

inserting for a second time the packages in the plurality of sockets; and

performing a second-pass test in parallel on the packages present in the sockets.

21. The apparatus of claim 20, wherein the IC package test arrangement is further adapted to test the plurality of IC packages by including, in the first-pass test, at least one of a sequential chain test and a built-in self-test.

22. The apparatus of claim 21, wherein the IC package test arrangement is further adapted to test the plurality of IC packages by including, in the second-pass test, a performance test.