Method and apparatus for improving accuracy of plasma etching process

• US 6,136,712 A
• Filed: 09/30/1998
• Issued: 10/24/2000
• Est. Priority Date: 09/30/1998
• Status: Expired due to Term

• Current Assignee: Lam Research Corporation
• Original Assignee: Lam Research Corporation
• Inventors: Kadavanich, Vikorn Martin, Klippert, Walter E II
• Primary Examiner(s): Powell, William
• Assistant Examiner(s): PEREZ RAMOS, VANESSA
• Application Number:
  US09/163,303
• Time in Patent Office: 755 Days
• Field of Search: 438/692, 438/706, 438/710, 438/700
• US Class Current: 438/692
• CPC Class Codes: G01B 11/06 for measuring thickness ; e.g. of sheet material thickness measurement by thermal means G01B21/085
• CPC Class Codes: G01B 11/0675 using interferometry
• CPC Class Codes: G01B 11/22 for measuring depth
• CPC Class Codes: H01L 21/3065 Plasma etching; Reactive-ion etching
• CPC Class Codes: H01L 21/32137 of silicon-containing layers
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 22/26 Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement endpoint detection arrangements in CMP apparatus B24B37/013, in discharge apparatus H01J37/32

Abstract

The invention provides a process and apparatus for improving the accuracy of plasma etching processes such as trench and recess etch processes. In such processes, a trench or recess is etched into a layer of material which does not have a stop layer at the desired depth of the etched openings. Instead, the etching process is carried out for a set time period calculated to achieve a desired etch depth on the basis of measured or estimated etching rates. For example, the duration of etching to achieve a target depth may be based on statistical analysis or real-time measurements of etch depths by interferometry. However, use of estimated etching rates or interferometry to control when etching should be terminated to achieve a desired etch depth can result in defective structures due to etched openings which are too deep or too shallow. According to the invention, a technique is provided for controlling the etching process in a manner which achieves more accurate etch depths in a more reproducible way by conducting a masking layer thickness measurement as part of the etching process.

Claims

1. A method of etching openings in a semiconductor substrate in a plasma chamber, comprising steps of:

supporting a semiconductor substrate on a substrate support in a plasma chamber, the semiconductor substrate including a masking layer and openings in the masking layer containing a material to be etched;

etching the material in the openings of the masking layer by generating an etching plasma in the plasma chamber;

measuring a thickness of the masking layer prior to etching of the material in the openings in the masking layer;

controlling duration of the etching step to achieve a target etch depth relative to an underside of the masking layer;

extinguishing the etching plasma when the target etch depth of the openings is obtained; and

removing the substrate from the chamber.

2. The method as set forth in claim 1, wherein the measuring step is carried out by interferometry and the plasma is a high density plasma.

3. The method as set forth in claim 1, wherein the thickness measuring step is carried out when a chemical species in the plasma is detected.

4. The method as set forth in claim 3, wherein the masking layer is of silicon nitride and the chemical species is silicon chloride or the masking layer is a photoresist and the chemical species is CO.

5. The method as set forth in claim 1, wherein prior to the thickness measuring step, a layer of material overlying the masking layer is cleared from the masking layer.

6. The method as set forth in claim 1, wherein prior to the etching step, a layer of material overlying the masking layer is removed by chemical mechanical polishing.

7. The method as set forth in claim 1, wherein the material in the openings does not include a stop layer at the target etch depth.

8. The method as set forth in claim 1, wherein the masking layer consists essentially of silicon nitride and the material in the openings consists essentially of polysilicon.

9. The method as set forth in claim 1, wherein the masking layer comprises two or more layers of material or a photoresist.