Thin stacked integrated circuit device
First Claim
Patent Images
1. A thin face-to-face stacked integrated circuit packaging structure comprising:
- a rigid interposer board having a first surface and a second surface with printed wiring circuits disposed on each surface for mounting an integrated circuit chip on each surface; and
said two integrated circuit chips having an array of electrical terminals connected electrically and mechanically to contact pads on the first and the second surfaces of said interposer board by a conductor having low alpha emissivity; and
said integrated circuits terminals electrically interconnected by printed metal traces on said interposer board to conductive vias between the first and second surfaces; and
said vias terminate in external connectors which comprise solder on the lower (or second) surface of the structure which comprise solder balls; and
said structure having perimeters slightly greater than the larger chip, and the thickness of the structure is in the range of 1.25 mm to 1.5 mm, and the space between said chips and interposer filled with an underfill polymer formulated with an electrically insulating, thermally conductive powder.
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Accused Products
Abstract
A thin, stacked face-to-face integrated circuit packaging structure includes a chips attached to both major surfaces of a rigid interposer, and interconnected by printed wiring traces and vias to external solder ball contacts attached to the interposer.
321 Citations
10 Claims
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1. A thin face-to-face stacked integrated circuit packaging structure comprising:
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a rigid interposer board having a first surface and a second surface with printed wiring circuits disposed on each surface for mounting an integrated circuit chip on each surface; and said two integrated circuit chips having an array of electrical terminals connected electrically and mechanically to contact pads on the first and the second surfaces of said interposer board by a conductor having low alpha emissivity; and said integrated circuits terminals electrically interconnected by printed metal traces on said interposer board to conductive vias between the first and second surfaces; and said vias terminate in external connectors which comprise solder on the lower (or second) surface of the structure which comprise solder balls; and said structure having perimeters slightly greater than the larger chip, and the thickness of the structure is in the range of 1.25 mm to 1.5 mm, and the space between said chips and interposer filled with an underfill polymer formulated with an electrically insulating, thermally conductive powder. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification