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Resistive pull-up device for I/O pin

  • US 6,137,313 A
  • Filed: 05/18/1998
  • Issued: 10/24/2000
  • Est. Priority Date: 06/20/1997
  • Status: Expired due to Term
First Claim
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1. A circuit formed in a semiconductor substrate comprising:

  • an I/O terminal;

    an I/O circuit coupled to the I/O terminal; and

    a pull-up circuit coupled to the I/O terminal, the pull-up circuit including;

    a pull-up transistor formed in a well region inside the substrate;

    a second transistor formed in the well region coupling in series with the pull-up transistor; and

    a switching bias circuit configured to bias the well region to either a supply voltage or the voltage applied to the I/O terminal;

    wherein the gate terminal of the pull-up transistor is coupled to ground; and

    wherein the gate terminal of the second transistor is coupled to the I/O terminal.

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